公开(公告)号：US5595923A

公开(公告)日：1997-01-21

申请号：US467986

申请日：1995-06-06

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura ,  Mutsuo Yamamoto

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura ,  Mutsuo Yamamoto

IPC分类号： G02F1/1362 ,  H01L21/20 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L27/12 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L27/1251 ,  H01L21/2022 ,  H01L21/8238 ,  H01L27/0922 ,  H01L27/1237 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78618 ,  H01L29/78675 ,  G02F1/13454 ,  Y10S148/016

摘要： A substance containing a catalyst element is formed so as to closely contact with an amorphous silicon film, or a catalyst element is introduced into the amorphous silicon film. The amorphous silicon film is annealed at a temperature which is lower than a crystallization temperature of usual amorphous silicon, thereby selectively crystallizing the amorphous silicon film. The crystallized region is used as a crystalline silicon TFT which can be used in a peripheral driver circuit of an active matrix circuit. The region which remains amorphous is used as an amorphous silicon TFT which can be used in a pixel circuit. A relatively small amount of a catalyst element for promoting crystallization is added to an amorphous silicon film, and an annealing process is conducted at a temperature which is lower than the distortion temperature of a substrate, thereby crystallizing the amorphous silicon film. A gate insulating film, and a gate electrode are then formed, and an impurity is implanted in a self-alignment manner. A film containing a catalyst element for promoting crystallization is closely contacted with the impurity region, or a relatively large amount of a catalyst element is introduced into the impurity region by an ion implantation or the like. Then, an annealing process is conducted at a temperature which is lower than the distortion temperature of the substrate, thereby activating the doping impurity.

摘要翻译： 形成含有催化剂元素的物质，以与非晶硅膜紧密接触，或将催化剂元素引入到非晶硅膜中。 非晶硅膜在比通常的非晶硅的结晶温度低的温度下退火，从而选择性地使非晶硅膜结晶。 结晶区域用作可用于有源矩阵电路的外围驱动电路的晶体硅T​​FT。 保持非晶形的区域用作可用于像素电路中的非晶硅TFT。 在非晶硅膜中添加相对少量的促进结晶的催化剂元素，并且在比基板的变形温度低的温度下进行退火处理，从而使非晶硅膜结晶。 然后形成栅极绝缘膜和栅电极，并以自对准的方式注入杂质。 含有促进结晶的催化剂元素的膜与杂质区紧密接触，或者通过离子注入等将相对大量的催化剂元素引入杂质区。 然后，在比基板的变形温度低的温度下进行退火处理，从而激活掺杂杂质。

公开(公告)号：US07622335B2

公开(公告)日：2009-11-24

申请号：US10926059

申请日：2004-08-26

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Takeshi Fukunaga ,  Yasuhiko Takemura

IPC分类号： H01L21/00

CPC分类号： H01L21/02672 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1251 ,  H01L27/1277 ,  H01L27/1281 ,  H01L29/66757

摘要： A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.

摘要翻译： 提供了使用晶体硅膜制造诸如薄膜晶体管的半导体器件的方法。 通过选择性地形成包含镍，铁，钴，钌，铑，钯，锇，铱，铂，钪，钛，钒，铬，锰，铜，锌，金，银的薄膜，颗粒或簇而获得晶体硅膜 或其硅化物以岛状，线状，条状，点状或薄膜形式存在于非晶硅膜上或下方，并以它们为起始点，通过在比非晶硅的正常结晶温度低的温度下进行退火， 。 通过在要成为有源层的半导体层上选择性地形成覆盖膜，通过在构成具有薄膜晶体管的动态电路的同时获得漏电流低的晶体管和迁移率高的晶体管 晶体管，然后通过其热结晶。

公开(公告)号：US06610142B1

公开(公告)日：2003-08-26

申请号：US08977944

申请日：1997-11-24

申请人： Toru Takayama ,  Hongyong Zhang ,  Shunpei Yamazaki ,  Yasuhiko Takemura

发明人： Toru Takayama ,  Hongyong Zhang ,  Shunpei Yamazaki ,  Yasuhiko Takemura

IPC分类号： C30B1322

CPC分类号： H01L27/12 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02675 ,  H01L27/1277 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/78654 ,  H01L29/78675

摘要： A process for fabricating a semiconductor at a lower crystallization temperature and yet at a shorter period of time, which comprises forming an insulator coating on a substrate; exposing said insulator coating to a plasma; forming an amorphous silicon film on said insulator coating after its exposure to said plasma; and heat treating said silicon film in the temperature range of from 400 to 650° C. or at a temperature not higher than the glass transition temperature of the substrate. The nucleation sites are controlled by selectively exposing the amorphous silicon film to a plasma or by selectively applying a substance containing elements having a catalytic effect thereto. A process for fabricating a thin film transistor using the same is also disclosed.

摘要翻译： 一种制造半导体的方法，该半导体在较低的结晶温度下并且在较短的时间内，其包括在基片上形成绝缘体涂层; 将所述绝缘体涂层暴露于等离子体; 在暴露于所述等离子体之后，在所述绝缘体涂层上形成非晶硅膜; 在400〜650℃的温度范围内或在不高于基板的玻璃化转变温度的温度下对所述硅膜进行热处理。 通过选择性地将非晶硅膜暴露于等离子体或通过选择性地施加含有其催化作用的元素的物质来控制成核位点。 还公开了使用其制造薄膜晶体管的工艺。

公开(公告)号：US5843225A

公开(公告)日：1998-12-01

申请号：US479720

申请日：1995-06-07

申请人： Toru Takayama ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Shunpei Yamazaki

发明人： Toru Takayama ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Shunpei Yamazaki

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L27/12 ,  H01L29/786 ,  C30B1/10

CPC分类号： H01L21/2022 ,  H01L21/2026 ,  H01L27/12 ,  H01L29/66757 ,  H01L29/78654 ,  H01L29/78675

摘要： A process for fabricating a semiconductor at a lower crystallization temperature and yet at a shorter period of time, which comprises forming an insulator coating on a substrate; exposing said insulator coating to a plasma; forming an amorphous silicon film on said insulator coating after its exposure to said plasma; and heat treating said silicon film in the temperature range of from 400.degree. to 650.degree. C. or at a temperature not higher than the glass transition temperature of the substrate. The nucleation sites are controlled by selectively exposing the amorphous silicon film to a plasma or by selectively applying a substance containing elements having a catalytic effect thereto. A process for fabricating a thin film transistor using the same is also disclosed.

摘要翻译： 一种制造半导体的方法，该半导体在较低的结晶温度下并且在较短的时间内，其包括在基片上形成绝缘体涂层; 将所述绝缘体涂层暴露于等离子体; 在暴露于所述等离子体之后，在所述绝缘体涂层上形成非晶硅膜; 在400〜650℃的温度或不高于基板的玻璃化转变温度的温度下对所述硅膜进行热处理。 通过选择性地将非晶硅膜暴露于等离子体或通过选择性地施加含有其催化作用的元素的物质来控制成核位点。 还公开了使用其制造薄膜晶体管的工艺。

公开(公告)号：US5426064A

公开(公告)日：1995-06-20

申请号：US207126

申请日：1994-03-08

申请人： Hognyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura

发明人： Hognyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786 ,  H01L21/265

CPC分类号： H01L29/66757 ,  H01L21/84 ,  Y10S148/016 ,  Y10S148/06 ,  Y10S148/15

摘要： Method of fabricating a semiconductor device, such as a thin-film transistor, having improved characteristics and improved reliability. The method is initiated with formation of a thin amorphous silicon film on a substrate. A metallization layer containing at least one of nickel, iron, cobalt, and platinum is selectively formed on or under the amorphous silicon film so as to be in intimate contact with the silicon film, or these metal elements are added to the amorphous silicon film. The amorphous silicon film is thermally annealed to crystallize it. The surface of the obtained crystalline silicon film is etched to a depth of 20 to 200.ANG., thus producing a clean surface. An insulating film is formed on the clean surface by CVD or physical vapor deposition. Gate electrodes are formed on the insulating film.

摘要翻译： 制造半导体器件（例如薄膜晶体管）的方法，其具有改进的特性和可靠性。 该方法是在衬底上形成薄的非晶硅膜开始的。 包含镍，铁，钴和铂中的至少一种的金属化层选择性地形成在非晶硅膜上或下方，以与硅膜紧密接触，或者将这些金属元素添加到非晶硅膜中。 将非晶硅膜热退火以使其结晶。 将得到的结晶硅膜的表面蚀刻到20〜200的深度，由此产生干净的表面。 通过CVD或物理气相沉积在清洁表面上形成绝缘膜。 在绝缘膜上形成栅电极。

公开(公告)号：US5580792A

公开(公告)日：1996-12-03

申请号：US387238

申请日：1995-02-13

申请人： Hognyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura

发明人： Hognyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Yasuhiko Takemura

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786 ,  H01L21/306

CPC分类号： H01L29/66757 ,  H01L21/84 ,  Y10S148/016 ,  Y10S148/06 ,  Y10S148/15

摘要： Method of fabricating a semiconductor device, such as a thin-film transistor, having improved characteristics and improved reliability. The method is initiated with formation of a thin amorphous silicon film on a substrate. A metallization layer containing at least one of nickel, iron, cobalt, and platinum is selectively formed on or under the amorphous silicon film so as to be in intimate contact with the silicon film, or these metal elements are added to the amorphous silicon film. The amorphous silicon film is thermally annealed to crystallize it. The surface of the obtained crystalline silicon film is etched to a depth of 20 to 200 .ANG., thus producing a clean surface. An insulating film is formed on the clean surface by CVD or physical vapor deposition. Gate electrodes are formed on the insulating film.

摘要翻译： 制造半导体器件（例如薄膜晶体管）的方法，其具有改进的特性和可靠性。 该方法是在衬底上形成薄的非晶硅膜开始的。 包含镍，铁，钴和铂中的至少一种的金属化层选择性地形成在非晶硅膜上或下方以与硅膜紧密接触，或者将这些金属元素添加到非晶硅膜中。 将非晶硅膜热退火以使其结晶。 将得到的结晶硅膜的表面蚀刻到20〜200的深度，由此产生干净的表面。 通过CVD或物理气相沉积在清洁表面上形成绝缘膜。 在绝缘膜上形成栅电极。

公开(公告)号：US07943930B2

公开(公告)日：2011-05-17

申请号：US12143035

申请日：2008-06-20

申请人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

发明人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

IPC分类号： H01L29/04

CPC分类号： H01L29/045 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757

摘要： In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.

摘要翻译： 在具有适于批量生产的结晶硅有源层的薄膜晶体管（TFT）中，通过离子注入或其它方式将催化元素引入到非晶硅膜的掺杂区域中。 该膜在低于玻璃基板的应变点的温度下结晶。 此外，形成栅极绝缘膜和栅电极。 杂质通过自对准过程引入。 然后，层压体在基板的应变点以下退火以活化掺杂剂杂质。 另一方面，Neckel或其它元素也用作促进非晶硅膜结晶的催化元素。 首先，将该催化元件与非晶硅膜的表面接触。 将膜在450至650℃加热以产生晶核。 将膜进一步在较高温度下加热以生长晶粒。 以这种方式，形成具有改善的结晶度的晶体硅膜。

公开(公告)号：US07391051B2

公开(公告)日：2008-06-24

申请号：US11321640

申请日：2005-12-30

申请人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

发明人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

IPC分类号： H01L31/00

CPC分类号： H01L29/045 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757

摘要： In thin film transistors (TFTs) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.

摘要翻译： 在具有适于批量生产的结晶硅有源层的薄膜晶体管（TFT）中，通过离子注入或其它方式将催化元素引入到非晶硅膜的掺杂区域中。 该膜在低于玻璃基板的应变点的温度下结晶。 此外，形成栅极绝缘膜和栅电极。 杂质通过自对准过程引入。 然后，层压体在基板的应变点以下退火以活化掺杂剂杂质。 另一方面，Neckel或其它元素也用作促进非晶硅膜结晶的催化元素。 首先，将该催化元件与非晶硅膜的表面接触。 将膜在450至650℃加热以产生晶核。 将膜进一步在较高温度下加热以生长晶粒。 以这种方式，形成具有改善的结晶度的晶体硅膜。

公开(公告)号：US20060192202A1

公开(公告)日：2006-08-31

申请号：US11321640

申请日：2005-12-30

申请人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

发明人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura ,  Akiharu Miyanaga ,  Hisashi Ohtani

IPC分类号： H01L29/786

CPC分类号： H01L29/045 ,  G09G2300/0408 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277 ,  H01L27/1296 ,  H01L29/66757

摘要： In thin film transistors (TFTS) having an active layer of crystalline silicon adapted for mass production, a catalytic element is introduced into doped regions of an amorphous silicon film by ion implantation or other means. This film is crystallized at a temperature below the strain point of the glass substrate. Further, a gate insulating film and a gate electrode are formed. Impurities are introduced by a self-aligning process. Then, the laminate is annealed below the strain point of the substrate to activate the dopant impurities. On the other hand, Neckel or other element is also used as a catalytic element for promoting crystallization of an amorphous silicon film. First, this catalytic element is applied in contact with the surface of the amorphous silicon film. The film is heated at 450 to 650° C. to create crystal nuclei. The film is further heated at a higher temperature to grow the crystal grains. In this way, a crystalline silicon film having improved crystallinity is formed.

公开(公告)号：US06642073B1

公开(公告)日：2003-11-04

申请号：US09112226

申请日：1998-07-09

申请人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Toru Takayama ,  Yasuhiko Takemura

IPC分类号： H01L2100

CPC分类号： H01L27/1277 ,  G02F1/13454 ,  H01L21/02532 ,  H01L21/02672 ,  H01L21/02686

摘要： Method of fabricating a semiconductor circuit is initiated with formation of an amorphous silicon film. Then, a second layer containing at least one catalytic element is so formed as to be in intimate contact with the amorphous silicon film, or the catalytic element is introduced into the amorphous silicon film. This amorphous silicon film is selectively irradiated with laser light or other equivalent intense light to crystallize the amorphous silicon film.

摘要翻译： 通过形成非晶硅膜开始制造半导体电路的方法。 然后，含有至少一个催化元素的第二层被形成为与非晶硅膜紧密接触，或者将催化元素引入到非晶硅膜中。 该非晶硅膜选择性地用激光或其它等效的强光照射以使非晶硅膜结晶。