公开(公告)号：US08988100B2

公开(公告)日：2015-03-24

申请号：US13567970

申请日：2012-08-06

申请人： Huy M. Nguyen ,  Vijay Gadde ,  Sivakumar Doraiswamy

发明人： Huy M. Nguyen ,  Vijay Gadde ,  Sivakumar Doraiswamy

IPC分类号： H03K19/003 ,  H04L25/02 ,  H03F3/19 ,  H03K19/00

CPC分类号： H04L25/028 ,  H03F3/19 ,  H03K19/0005 ,  H03K19/00384

摘要： Described are amplifiers that facilitate high-speed communication with calibrated drive strength and termination impedance. Drivers and termination elements can be divided into a number N of parallel portions, one or more of which can be disabled and updated without interfering with signal (e.g., clock or data) transmission. Some embodiments identify inactive elements by examining incoming signals.

摘要翻译： 描述了通过校准的驱动强度和终端阻抗促进高速通信的放大器。 驱动器和终端元件可以被划分为数个N个并行部分，其中一个或多个可被禁用和更新，而不会干扰信号（例如，时钟或数据）传输。 一些实施例通过检查输入信号来识别非活动元件。

公开(公告)号：US07898878B2

公开(公告)日：2011-03-01

申请号：US12220454

申请日：2008-07-24

申请人： Huy M. Nguyen ,  Vijay Gadde ,  Bret G. Stott

发明人： Huy M. Nguyen ,  Vijay Gadde ,  Bret G. Stott

IPC分类号： G11C7/00

CPC分类号： G11C11/4076 ,  G11C7/1018 ,  G11C7/1045 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4096 ,  G11C2207/2254

摘要： A data system component having a state machine circuit and receivers that utilize high and low threshold signals permits accurate detection of strobe signal pattern edges such as those for preamble, burst and post-amble conditions in the strobe signal. The state machine circuit may then be configured to set conditions associated with further circuit elements such as for power saving, data reception, on-die termination, etc. based on the conditions detected in the strobe signal to improve data or memory system performance. The components may be implemented as part of memory controllers and/or memory such as a dynamic random access memory and used in memory read and write operations.

摘要翻译： 具有状态机电路的数据系统组件和利用高和低阈值信号的接收器允许精确检测选通信号模式边缘，例如在选通信号中的前导码，脉冲串和后导码条件。 然后，状态机电路可以被配置为基于在选通信号中检测到的条件来设置与进一步的电路元件相关联的条件，例如用于功率节省，数据接收，片上终止等，以改善数据或存储器系统性能。 这些组件可以被实现为诸如动态随机存取存储器的存储器控​​制器和/或存储器的一部分，并且用于存储器读和写操作。

公开(公告)号：US20100202227A1

公开(公告)日：2010-08-12

申请号：US12668344

申请日：2008-05-20

申请人： Huy M. Nguyen ,  Vijay Gadde ,  Bret G. Stott

发明人： Huy M. Nguyen ,  Vijay Gadde ,  Bret G. Stott

IPC分类号： G11C7/00 ,  H03K19/003

CPC分类号： G11C5/063

摘要： A memory controller includes a transmit circuit coupled to an output node and a receive circuit coupled to an input node. The transmit circuit transmits first data to a memory device through the output node and the receive circuit is configured to receive second data from the memory device through the input node. The memory controller includes a calibration circuit and control logic coupled to the calibration circuit, where the calibration circuit and the control logic are configured to select a first reference voltage and a driver impedance for the transmit circuit and are configured to select a second reference voltage and a termination impedance for the receive circuit. The first reference voltage, the second reference voltage, the driver impedance and the termination impedance are selected from a set of pre-determined values, which are associated with different signaling modes for communication of the first data and the second data.

摘要翻译： 存储器控制器包括耦合到输出节点的发射电路和耦合到输入节点的接收电路。 发送电路通过输出节点将第一数据发送到存储装置，并且接收电路被配置为通过输入节点从存储装置接收第二数据。 存储器控制器包括校准电路和耦合到校准电路的控制逻辑，其中校准电路和控制逻辑被配置为为发射电路选择第一参考电压和驱动器阻抗，并且被配置为选择第二参考电压和 接收电路的终端阻抗。 从与用于通信第一数据和第二数据的不同信令模式相关联的一组预定值中选择第一参考电压，第二参考电压，驱动器阻抗和终端阻抗。

公开(公告)号：US20090034344A1

公开(公告)日：2009-02-05

申请号：US12220454

申请日：2008-07-24

申请人： Huy M. Nguyen ,  Vijay Gadde ,  Bret G. Stott

发明人： Huy M. Nguyen ,  Vijay Gadde ,  Bret G. Stott

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C11/4076 ,  G11C7/1018 ,  G11C7/1045 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/22 ,  G11C7/222 ,  G11C11/4096 ,  G11C2207/2254

摘要： A data system component having a state machine circuit and receivers that utilize high and low threshold signals permits accurate detection of strobe signal pattern edges such as those for preamble, burst and post-amble conditions in the strobe signal. The state machine circuit may then be configured to set conditions associated with further circuit elements such as for power saving, data reception, on-die termination, etc. based on the conditions detected in the strobe signal to improve data or memory system performance. The components may be implemented as part of memory controllers and/or memory such as a dynamic random access memory and used in memory read and write operations.

摘要翻译： 具有状态机电路的数据系统组件和利用高和低阈值信号的接收器允许精确检测选通信号模式边缘，例如在选通信号中的前导码，脉冲串和后导码条件。 然后，状态机电路可以被配置为基于在选通信号中检测到的条件来设置与进一步的电路元件相关联的条件，例如用于功率节省，数据接收，片上终止等，以改善数据或存储器系统性能。 这些组件可以被实现为诸如动态随机存取存储器的存储器控​​制器和/或存储器的一部分，并且用于存储器读和写操作。

公开(公告)号：US07389194B2

公开(公告)日：2008-06-17

申请号：US11176876

申请日：2005-07-06

申请人： Huy M. Nguyen ,  Vijay Gadde ,  Sivakumar Doraiswamy

发明人： Huy M. Nguyen ,  Vijay Gadde ,  Sivakumar Doraiswamy

IPC分类号： H03F3/04 ,  G01R35/00

CPC分类号： H04L25/028 ,  H03F3/19 ,  H03K19/0005 ,  H03K19/00384

摘要： Described are amplifiers that facilitate high-speed communication with calibrated drive strength and tennination impedance. Drivers and termination elements can be divided into a number N of parallel portions, one or more of which can be updated while signals (e.g, clock or data) are transmitted. Some embodiments identify elements in a high-impedance state by examining incoming signals.

摘要翻译： 描述了促进高速通信的放大器，具有校准的驱动强度和灵敏度阻抗。 驱动器和终端元件可以被划分为数个N个并行部分，其中一个或多个可以在发送信号（例如，时钟或数据）的同时更新。 一些实施例通过检查输入信号来识别处于高阻抗状态的元件。

公开(公告)号：US07015721B2

公开(公告)日：2006-03-21

申请号：US10925544

申请日：2004-08-24

申请人： Huy M. Nguyen ,  Benedict Lau ,  Roxanne Vu

发明人： Huy M. Nguyen ,  Benedict Lau ,  Roxanne Vu

IPC分类号： H03K19/0175

CPC分类号： H03K19/0013 ,  H03K17/166 ,  H03K19/01735

摘要： An improved, open-loop push-pull driver is described. Closed-loop feedback loop techniques for control of the push-pull driver are described. These techniques are particularly well adapted to control shoot-through current in a push-pull driver circuit.

摘要翻译： 描述了改进的开环推挽式驱动器。 描述了用于控制推挽驱动器的闭环反馈回路技术。 这些技术特别适用于控制推挽式驱动电路中的直通电流。

公开(公告)号：US06781416B1

公开(公告)日：2004-08-24

申请号：US10020921

申请日：2001-12-19

申请人： Huy M. Nguyen ,  Benedict Lau ,  Roxanne Vu

发明人： Huy M. Nguyen ,  Benedict Lau ,  Roxanne Vu

IPC分类号： H03K190175

CPC分类号： H03K19/0013 ,  H03K17/166 ,  H03K19/01735

摘要： An improved, open-loop push-pull driver is described. Closed-loop feedback loop techniques for control of the push-pull driver are described. These techniques are particularly well adapted to control shoot-through current in a push-pull driver circuit.

摘要翻译： 描述了改进的开环推挽式驱动器。 描述了用于控制推挽驱动器的闭环反馈回路技术。 这些技术特别适用于控制推挽式驱动电路中的直通电流。

公开(公告)号：US20140210545A1

公开(公告)日：2014-07-31

申请号：US14241843

申请日：2012-08-31

申请人： Brian S. Leibowitz ,  Michael D. Bucher ,  Lei Luo ,  Chaofeng Charlie Huang ,  Amir Amirkhany ,  Huy M. Nguyen ,  Hsuan-Jung (Bruce) Su ,  John Wilson

发明人： Brian S. Leibowitz ,  Michael D. Bucher ,  Lei Luo ,  Chaofeng Charlie Huang ,  Amir Amirkhany ,  Huy M. Nguyen ,  Hsuan-Jung (Bruce) Su ,  John Wilson

IPC分类号： G05F1/46

CPC分类号： G05F1/462 ,  G11C5/147

摘要： An integrated circuit includes a voltage regulator to supply a regulated voltage and a data output that couples to an unterminated transmission line. The circuit draws a variable amount of power from the voltage regulator according to the data. The voltage regulator includes a first current generation circuit to provide a data transition-dependent current.

摘要翻译： 集成电路包括用于提供调节电压的电压调节器和耦合到未终端传输线的数据输出。 该电路根据数据从电压调节器抽取可变量的功率。 电压调节器包括用于提供数据转变相关电流的第一电流产生电路。

公开(公告)号：US08610307B2

公开(公告)日：2013-12-17

申请号：US13747417

申请日：2013-01-22

申请人： Jared LeVan Zerbe ,  Jaeha Kim ,  Yohan U. Frans ,  Huy M. Nguyen

发明人： Jared LeVan Zerbe ,  Jaeha Kim ,  Yohan U. Frans ,  Huy M. Nguyen

IPC分类号： H02J1/10

CPC分类号： G05F1/10 ,  G06F1/26 ,  Y10T307/406 ,  Y10T307/50

摘要： A method of adjusting a voltage supply to an electronic device coupled to a wired communication link in accordance with a performance metric associated with the wired communication link. A voltage adjust signal is generated based on the performance metric. The voltage adjustment signal is then used for updating the voltage supply to the electronic device.

公开(公告)号：US20120081146A1

公开(公告)日：2012-04-05

申请号：US13316046

申请日：2011-12-09

申请人： Kyung Suk Oh ,  Woopoung Kim ,  Huy M. Nguyen ,  Eugene C. Ho

发明人： Kyung Suk Oh ,  Woopoung Kim ,  Huy M. Nguyen ,  Eugene C. Ho

IPC分类号： H03K19/003

CPC分类号： H03K19/0005 ,  G11C7/1048 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/1084

摘要： Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.

摘要翻译： 描述存储器控制器的实施例。 该存储器控制器通过信号线将信号传送到存储器件，信号线可以是数据信号线或命令/地址信号线。 信号线的终止在存储器控制器外部的外部阻抗和存储器控制器内的内部阻抗之间分配。 存储器控制器在通信信号之前不会激活外部阻抗，因此在通信信号后不会禁用外部阻抗。 可以启用或禁用内存控制器的内部阻抗，以减少接口功耗。 此外，可以使用无源部件，有源部件或两者来实现内部阻抗。 例如，内部阻抗可以包括片上端接和至少一个驱动器中的一个或两者。