公开(公告)号：US12080620B2

公开(公告)日：2024-09-03

申请号：US16912432

申请日：2020-06-25

Applicant: Intel Corporation

Inventor： Feras Eid ,  Xavier Brun ,  Paul Diglio ,  Joe Walczyk ,  Sergio Antonio Chan Arguedas

IPC: H01L23/373 ,  B33Y70/00 ,  B33Y80/00

CPC classification number: H01L23/3735 ,  B33Y70/00 ,  B33Y80/00

Abstract: An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a backside metallization layer on the backside surface of the integrated circuit device, wherein the backside metallization layer comprises a bond layer on the backside surface of the integrated circuit device, a high thermal conductivity layer on the bond layer, and a cap layer on the high thermal conductivity layer. The bond layer may be a layered stack comprising an adhesion promotion layer on the backside of the integrated circuit device and at one least metal layer. The high thermal conductivity layer may be an additively deposited material having a thermal conductivity greater than silicon, such as copper, silver, aluminum, diamond, silicon carbide, boron nitride, aluminum nitride, and combinations thereof.

公开(公告)号：US20240006378A1

公开(公告)日：2024-01-04

申请号：US17855145

申请日：2022-06-30

Applicant: Intel Corporation

Inventor： Sergio Antonio Chan Arguedas ,  Zheng Ren ,  Arifur Chowdhury

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/367 ,  H01L23/00

CPC classification number: H01L25/0655 ,  H01L25/18 ,  H01L23/3675 ,  H01L24/83 ,  H01L24/16 ,  H01L2224/16225 ,  H01L24/32 ,  H01L2224/32245 ,  H05K1/181

Abstract: A die package comprises a substrate comprising a first face and an opposing second face, a first semiconductor die coupled to the first face of the substrate, a second semiconductor die coupled to the first face of the substrate; and a heat spreader, wherein the first semiconductor die is thermally connected to the heat spreader by a first thermal interface material and the second semiconductor die is thermally connected to the heat spreader by a second thermal interface material, wherein the first thermal interface material comprises a first composition and the second thermal interface material comprises a second composition, wherein the first composition has a lower elastic modulus than the second composition under a first specified condition or conditions.

公开(公告)号：US20230343738A1

公开(公告)日：2023-10-26

申请号：US18346321

申请日：2023-07-03

Applicant: Intel Corporation

Inventor： Debendra Mallik ,  Sergio Antonio Chan Arguedas ,  Jimin Yao ,  Chandra Mohan Jha

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/367

CPC classification number: H01L24/17 ,  H01L23/16 ,  H01L23/3675 ,  H01L23/562 ,  H01L2224/17051 ,  H01L2224/1713 ,  H01L2224/17163 ,  H01L2224/17181 ,  H01L2224/17519

Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.

公开(公告)号：US20210398871A1

公开(公告)日：2021-12-23

申请号：US16905731

申请日：2020-06-18

Applicant: Intel Corporation

Inventor： Feras Eid ,  Sergio Antonio Chan Arguedas ,  Bamidele Daniel Falola

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/373 ,  H01L21/48

Abstract: A hybrid integrated heat spreader suitable for an integrated circuit (IC) die package. The hybrid integrated heat spreader includes a top sheet material and a sealant interface material located where the heat spreader is to contact an assembly substrate. The sealant interface material may offer greater adhesion to a sealant employed between the interface material and the package substrate. In some examples, the sealant interface material has a greater surface roughness and/or a different composition than a surface of the integrated heat spreader that is in close thermal contact with an IC die through a thermal interface material. With the sealant interface material improving adhesion, the sealant may have a higher bulk modulus, enabling the integrated heat spreader to impart greater stiffness to the IC die package assembly.

公开(公告)号：US20210020537A1

公开(公告)日：2021-01-21

申请号：US16516692

申请日：2019-07-19

Applicant: Intel Corporation

Inventor： Sergio Antonio Chan Arguedas ,  Manish Dubey ,  Peng Li ,  Aravindha R. Antoniswamy ,  Anup Pancholi

IPC: H01L23/367 ,  H01L23/00

Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A solder thermal interface material (STIM) may be coupled with the die such that the die is between the STIM and the package substrate. An integrated heat spreader (IHS) may be coupled with the STIM such that the STIM is between the IHS and the die, and the IHS may include a feature that is to control bleed-out of the STIM during STIM reflow based on surface tension of the STIM. Other embodiments may be described or claimed.

公开(公告)号：US20200373220A1

公开(公告)日：2020-11-26

申请号：US16419827

申请日：2019-05-22

Applicant: Intel Corporation

Inventor： Sergio Antonio Chan Arguedas ,  Amitesh Saha ,  Marco Aurelio Cartas ,  Ken Hackenberg ,  Emilio Tarango Valles

IPC: H01L23/42 ,  H01L23/373

Abstract: Disclosed herein are integrated circuit (IC) packages with thermal interface materials (TIMs) with different material compositions, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a die, and TIM, wherein the die is between the TIM and the package substrate along a vertical axis. The TIM may include a first TIM having a first material composition and a second TIM having a second material composition; the first material composition may be different than the second material composition, and the first TIM and the second TIM may be in different locations along a lateral axis perpendicular to the vertical axis.