公开(公告)号：US10331605B2

公开(公告)日：2019-06-25

申请号：US15251097

申请日：2016-08-30

Applicant: International Business Machines Corporation

Inventor： Victor A. Garibay ,  Daniel E. Hurlimann ,  Chetan Mehta ,  Fernando Pizzano ,  Thomas R. Sand

IPC: G06F13/40 ,  G06F13/42

Abstract: A computer-implemented method determines that a link operation associated with a first link, among the set of interface links in a computing system, has resulted in a first set of signal lanes, included in the first link, becoming unused. The method further includes determining a link configuration and selecting, based on the link configuration, a second link from among the interface links, and determining a second set of signal lanes, from among the unused signal lanes included in the first link, to include in the second link. The signal lanes to include in the second link are based on an attribute associated with the second link. The method further includes dynamically reconfiguring the signal lanes included in the second to set to be included in the lanes in the second link. Some computing systems include a lane routing device connected to signal lanes of links among the interface links.

公开(公告)号：US10296484B2

公开(公告)日：2019-05-21

申请号：US14956373

申请日：2015-12-01

Applicant: International Business Machines Corporation

Inventor： Victor A. Garibay ,  Daniel E. Hurlimann ,  Chetan Mehta ,  Fernando Pizzano ,  Thomas R. Sand

IPC: G06F13/40 ,  G06F13/42 ,  G06F13/16

Abstract: The embodiments relate to dynamically re-allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled at boot-time and, in response to detection of an additional adapter received after boot-time, an additional allocation of lanes to the additional adapter is dynamically controlled. The additional allocation includes allocating unallocated lanes to the additional adapter, and re-allocating at least one lane from the initial allocation in response to the unallocated lanes being insufficient.

公开(公告)号：US10275362B2

公开(公告)日：2019-04-30

申请号：US15953226

申请日：2018-04-13

Applicant: International Business Machines Corporation

Inventor： Victor A. Garibay ,  Daniel E. Hurlimann ,  Chetan Mehta ,  Travis J. Pizel ,  Fernando Pizzano ,  Thomas R. Sand

IPC: G06F12/10 ,  G06F12/1027 ,  G06F12/1081 ,  G06F9/455 ,  G06F12/1009 ,  G06F13/28

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

公开(公告)号：US20180232317A1

公开(公告)日：2018-08-16

申请号：US15953226

申请日：2018-04-13

Applicant: International Business Machines Corporation

Inventor： Victor A. Garibay ,  Daniel E. Hurlimann ,  Chetan Mehta ,  Travis J. Pizel ,  Fernando Pizzano ,  Thomas R. Sand

IPC: G06F12/1027 ,  G06F12/1081 ,  G06F9/455 ,  G06F12/1009

CPC classification number: G06F12/1027 ,  G06F9/45558 ,  G06F12/1009 ,  G06F12/1081 ,  G06F13/28 ,  G06F2009/45583 ,  G06F2212/65 ,  G06F2212/68

Abstract: A system and method dynamically allocate address translation tables for direct memory access windows by donating logical memory blocks to allocate to the address translation tables. A dynamic address translation table allocation module dynamically changes the allocation of memory to the address translation tables without a platform or partition reboot. A portion of the dynamic address translation table allocation module may reside in the hypervisor and in the partition and communicate to dynamically allocate memory to the address translation tables. The dynamic address translation table allocation module in the partition may donate logical memory blocks to the hypervisor to increase the allocation of memory to the address translation tables.

公开(公告)号：US09697155B2

公开(公告)日：2017-07-04

申请号：US14549912

申请日：2014-11-21

Applicant: International Business Machines Corporation

Inventor： Jesse P. Arroyo ,  Ellen M. Bauman ,  Curtis S. Eide ,  Christopher J. Engel ,  Gregory M. Nordstrom ,  Harald Pross ,  Thomas R. Sand ,  William A. Thompson

IPC: G06F13/362 ,  G06F13/40 ,  G06F13/42 ,  G06F9/445 ,  G06F9/44

CPC classification number: G06F13/362 ,  G06F9/4411 ,  G06F9/44505 ,  G06F13/4027 ,  G06F13/4068 ,  G06F13/4282

Abstract: A method, system and computer program product are provided for detecting and configuring an external input/output (IO) enclosure in a computer system. A PCIE Host Bridge (PHB) in a system unit is connected to a plurality of PCIE add-in card slots. One or more cables are connected between the PHB and the external enclosure. System firmware including detecting and configuring functions uses sideband structure for detecting a PCIE cable card and configuring the external input/output (IO) enclosure.

公开(公告)号：US20170153989A1

公开(公告)日：2017-06-01

申请号：US14955739

申请日：2015-12-01

Applicant: International Business Machines Corporation

Inventor： Victor A. Garibay ,  Daniel E. Hurlimann ,  Chetan Mehta ,  Fernando Pizzano ,  Thomas R. Sand

IPC: G06F13/16 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F13/16 ,  G06F13/4027 ,  G06F13/4068 ,  G06F13/4282

Abstract: The embodiments relate to dynamically allocating lanes of a computer bus. A computer system having a processor in communication with a module is booted. Allocation of lanes among adapters in communication with connectors of the computer bus is controlled, which includes the module controlling an allocation of the lanes to adapters present at boot-time. The allocation is dynamic and functions to maximize lane allocation and functionality for the detected adapters.

公开(公告)号：US20160147606A1

公开(公告)日：2016-05-26

申请号：US14866931

申请日：2015-09-26

Applicant: International Business Machines Corporation

Inventor： Jesse P. Arroyo ,  Ellen M. Bauman ,  Timothy R. Block ,  Christopher J. Engel ,  Kaveh Naderi ,  Gregory M. Nordstrom ,  Harald Pross ,  Thomas R. Sand

IPC: G06F11/14 ,  G06F13/42 ,  G06F11/07 ,  G06F13/40 ,  G06F11/30 ,  G06F11/22

CPC classification number: G06F11/1423 ,  G06F11/0793 ,  G06F11/221 ,  G06F11/2221 ,  G06F11/2247 ,  G06F11/3027 ,  G06F11/3041 ,  G06F11/3051 ,  G06F13/287 ,  G06F13/4022 ,  G06F13/4282

Abstract: A method, system and computer program product are provided for detecting state and sparing of optical Peripheral Component Interconnect Express (PCI-Express or PCIE) cable channels attached to an IO drawer. System firmware is provided for implementing health check functions and state detection and sparing functions. One or more optical cables are connected between a host bridge and an PCIE enclosure, each optical cable includes one or more spare optical channels. An identified failed optical channel is rerouted to the spare optical channel.

Abstract translation: 提供了一种方法，系统和计算机程序产品，用于检测连接到IO抽屉的光学外围组件互连Express（PCI-Express或PCIE）电缆通道的状态和备用。 提供系统固件，用于实现健康检查功能和状态检测和备用功能。 一个或多个光缆连接在主机桥和PCIE机箱之间，每个光缆包括一个或多个备用光通道。 识别的故障光通道被重新路由到备用光通道。