公开(公告)号：US20240178325A1

公开(公告)日：2024-05-30

申请号：US18519392

申请日：2023-11-27

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Marina MOCHIZUKI ,  Ryo ONODERA

IPC: H01L29/786 ,  H01L29/06

CPC classification number: H01L29/7869 ,  H01L29/0603 ,  H01L29/78696

Abstract: A semiconductor device includes an oxide insulating layer, an oxide semiconductor layer on the oxide insulating layer, a gate insulating layer on and in contact with the oxide semiconductor layer, and a gate electrode on the gate insulating layer. The oxide semiconductor layer includes a channel region overlapping the gate electrode, and source and drain regions that do not overlap the gate electrode. At an interface between the source and drain regions and the gate insulating layer, a concentration of an impurity on a surface of at least one of the source and drain regions is greater than or equal to 1×1019 cm−3.

公开(公告)号：US20240105819A1

公开(公告)日：2024-03-28

申请号：US18474389

申请日：2023-09-26

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/02667 ,  H01L29/7869

Abstract: A method for manufacturing a semiconductor device includes depositing a first metal oxide film with aluminum as a major component on a substrate, depositing an amorphous oxide semiconductor film on the first metal oxide film under an oxygen partial pressure of 3% to 5%, processing the oxide semiconductor film into a patterned oxide semiconductor layer, crystallizing the oxide semiconductor layer by performing a first heat treatment on the patterned oxide semiconductor layer, processing the first metal oxide film using the crystallized oxide semiconductor layer as a mask, depositing a gate insulating film on the oxide semiconductor layer, and forming a gate electrode on the gate insulating film, wherein a thickness of the oxide semiconductor film is more than 10 nm and 30 nm or less.

公开(公告)号：US20230387322A1

公开(公告)日：2023-11-30

申请号：US18449830

申请日：2023-08-15

Applicant: Japan Display Inc.

Inventor： Takaya TAMARU ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Hajime WATAKABE

IPC: H01L29/786 ,  H01L29/40 ,  H01L29/45

CPC classification number: H01L29/7869 ,  H10K59/1213 ,  H01L29/45 ,  H01L29/401

Abstract: A semiconductor device including: an oxide semiconductor layer including a first surface and a second surface opposite to the first surface; a gate electrode facing the oxide semiconductor layer; a gate insulating layer between the oxide semiconductor layer and the gate electrode; and a pair of first electrode being in contact with the first surface of the oxide semiconductor layer, respectively, wherein the oxide semiconductor layer including a region in which composition ratio of nitrogen is 2 percent or more within a depth range of 2 nanometers from the first surface in a region vicinity of an edge of at least one of the first electrode of the pair of first electrode.

公开(公告)号：US20230317833A1

公开(公告)日：2023-10-05

申请号：US18127661

申请日：2023-03-29

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/40 ,  H01L21/385

CPC classification number: H01L29/66969 ,  H01L29/7869 ,  H01L29/401 ,  H01L21/385 ,  H01L29/78696 ,  H01L29/42384

Abstract: A method for manufacturing semiconductor device according to an embodiment includes; forming an oxide semiconductor layer above a substrate; forming a gate insulating layer above the oxide semiconductor layer; forming a metal oxide layer containing aluminum as a main component above the gate insulating layer; performing a heat treatment in a state where the metal oxide layer is formed above the gate insulating layer; removing the metal oxide layer after the heat treatment; and forming a gate electrode above the gate insulating layer.

公开(公告)号：US20230068478A1

公开(公告)日：2023-03-02

申请号：US17894176

申请日：2022-08-24

Applicant: Japan Display Inc.

Inventor： Ryo ONODERA ,  Masashi TSUBUKU ,  Hajime WATAKABE

IPC: H01L29/786

Abstract: According to one embodiment, a semiconductor device includes a substrate, a first insulating layer disposed on the substrate, an oxide semiconductor disposed on the first insulating layer and formed in an island shape, a second insulating layer covering the oxide semiconductor, a gate electrode disposed on the second insulating layer, and a source electrode and a drain electrode in contact with the oxide semiconductor. The oxide semiconductor includes a plurality of first openings located between the gate electrode and the source electrode, and a plurality of second openings located between the gate electrode and the drain electrode, in planar view.

公开(公告)号：US20230059822A1

公开(公告)日：2023-02-23

申请号：US17889402

申请日：2022-08-17

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/423 ,  H01L29/66 ,  G02F1/1368

Abstract: According to one embodiment, a transistor includes a first gate electrode, a second gate electrode, an oxide semiconductor layer disposed between the first gate electrode and the second gate electrode, and a source electrode and a drain electrode each connected to the oxide semiconductor layer, wherein the oxide semiconductor layer includes a channel forming region, a source region, and a drain region, a light irradiation region which is made low-resistance by irradiating light thereto is each formed between the channel forming region and the source region and between the channel forming region and the drain region, and the first date electrode and the second gate electrode have different lengths.

公开(公告)号：US20230058988A1

公开(公告)日：2023-02-23

申请号：US17891162

申请日：2022-08-19

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Takeshi SAKAI

IPC: H01L29/786 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417

Abstract: According to one embodiment, a transistor includes a gate electrode, an oxide semiconductor layer which overlaps the gate electrode and including a central portion and an end portion, and a source electrode and a drain electrode each connected to the oxide semiconductor layer, wherein an oxidation degree of the end portion is lower than an oxidation degree of the central portion, and a length of the gate electrode overlapping the central portion is greater than a length of the gate electrode overlapping the end portion.

公开(公告)号：US20210257402A1

公开(公告)日：2021-08-19

申请号：US17167081

申请日：2021-02-04

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Akihiro HANADA ,  Marina MOCHIZUKI ,  Ryo ONODERA ,  Fumiya KIMURA ,  Isao SUZUMURA

IPC: H01L27/146

Abstract: The present invention provides a technology which realizes a reliable semiconductor device including a photosensor device by preventing pent roofs of edges of a P+ layer from being generated and a metal wiring installed over the P+ layer from coming down while securing the electrical conductivity of the P+ layer. The semiconductor device includes a photosensor including a photodiode formed on a substrate. The photodiode includes: a cathode electrode; a laminated structure that is formed on the cathode electrode and in which an N+ layer, an I layer, and a P+ layer are laminated in this order; an anode electrode formed on the P+ layer; a first insulating film formed so as to cover a portion of the anode electrode and edges of the laminated structure; and a metal wiring connected to the anode electrode. The edges of the laminated structure are formed in forward tapered shapes in a cross-sectional view.

公开(公告)号：US20210011536A1

公开(公告)日：2021-01-14

申请号：US17034722

申请日：2020-09-28

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Kazufumi WATABE

IPC: G06F1/26 ,  H01L27/12 ,  H04L12/24 ,  H04L12/853 ,  H04L29/08

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US20200251505A1

公开(公告)日：2020-08-06

申请号：US16852925

申请日：2020-04-20

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Isao SUZUMURA ,  Akihiro HANADA ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H01L29/66

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.