公开(公告)号：US06534348B1

公开(公告)日：2003-03-18

申请号：US09292063

申请日：1999-04-14

申请人： Theodore S. Moise ,  Glen D. Wilk

发明人： Theodore S. Moise ,  Glen D. Wilk

IPC分类号： H01L2100

CPC分类号： H01L29/4908 ,  H01L29/045 ,  H01L29/66772 ,  H01L29/78648 ,  H01L29/78654

摘要： A method of fabricating a transistor using silicon on lattice matched insulator. A first monocrystalline silicon layer is provided and a first layer of dielectric is epitaxially deposited over the first silicon layer substantially lattice matched with the first silicon layer and substantially monocrystalline. A first electrically conductive gate electrode is epitaxially formed over the first layer of dielectric substantially lattice matched with the first layer of dielectric. A second layer of dielectric is epitaxially deposited conformally over the first gate electrode and exposed portions of first layer of dielectric substantially lattice matched with the first silicon layer and substantially monocrystalline. A second monocrystalline silicon layer is epitaxially deposited over the second layer of dielectric and a third layer of dielectric is epitaxially deposited over the second silicon layer substantially lattice matched with the first silicon layer and substantially monocrystalline. A second electrically conductive gate electrode is epitaxially deposited and formed over the third layer of dielectric which is substantially lattice matched with the first silicon layer and the first layer of dielectric. Source and drain regions are formed in the second silicon layer.

摘要翻译： 在晶格匹配绝缘体上制造使用硅的晶体管的方法。 提供第一单晶硅层，并且第一层电介质外延沉积在基本上与第一硅层晶格匹配并且基本上单晶的第一硅层上。 第一导电栅极电极外延形成在基本上与第一电介质层晶格匹配的电介质的第一层上。 电介质的第二层被外延地平铺地沉积在第一栅极电极上，并且第一介电层的暴露部分基本上与第一硅层晶格匹配并且基本上是单晶的。 第二单晶硅层外延沉积在第二层电介质上，并且第三层电介质外延沉积在第二硅层上，基本上与第一硅层基本上晶格匹配并且基本上是单晶。 第二导电栅电极被外延沉积并形成在与第一硅层和第一介电层基本上晶格匹配的第三电介质层上。 源极和漏极区域形成在第二硅层中。

公开(公告)号：US6069368A

公开(公告)日：2000-05-30

申请号：US211948

申请日：1998-12-15

申请人： Glen D. Wilk ,  John M. Anthony

发明人： Glen D. Wilk ,  John M. Anthony

IPC分类号： H01L21/20 ,  H01L29/88 ,  H01L29/06

CPC分类号： B82Y10/00 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L29/882 ,  Y10S438/979

摘要： A method of forming a crystalline silicon well over a perovskite barrier layer, preferably for use in formation of a resonant tunneling diode. A silicon substrate (1) is provided of predetermined crystallographic orientation. A layer of crystallographic perovskite material (5) is formed over the silicon substrate and substantially matched to the lattice constant of the silicon substrate. A layer of crystallographic silicon (7) is formed over the perovskite layer substantially matched to the lattice constant of the perovskite layer. The perovskite layer is formed by the steps of placing the silicon substrate in a chamber and then evaporating a layer of barium strontium oxide (3) thereon with a thickness of from about three to about six Angstroms and then evaporating a layer of calcium strontium titanate (5) thereon having a thickness of from about six to about 25 Angstroms thereon in the case of a tunneling diode. A second layer of silicon oxide (9) is provided on the layer of silicon remote from the perovskite layer.

摘要翻译： 在钙钛矿阻挡层上形成晶体硅的方法，优选用于形成谐振隧穿二极管。 硅基板（1）具有预定的晶体取向。 在硅衬底上形成一层晶体钙钛矿材料（5），并且基本上与硅衬底的晶格常数匹配。 在与钙钛矿层的晶格常数基本匹配的钙钛矿层上形成一层结晶硅（7）。 钙钛矿层通过以下步骤形成：将硅衬底放置在室中，然后在其上蒸发厚度约3至约6埃的一层氧化钡钡（3），然后蒸发一层钛酸锶钙（ 在其上，在隧道二极管的情况下其上具有约6至约25埃的厚度。 第二层氧化硅（9）设置在远离钙钛矿层的硅层上。

公开(公告)号：US06291283B1

公开(公告)日：2001-09-18

申请号：US09436895

申请日：1999-11-09

申请人： Glen D. Wilk

发明人： Glen D. Wilk

IPC分类号： H01L218238

CPC分类号： H01L21/02148 ,  H01L21/02159 ,  H01L21/02266 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31604 ,  H01L21/823462 ,  H01L29/517 ,  H01L29/518

摘要： An embodiment of the instant invention is a method of forming a semiconductor device situated over a semiconductor substrate, the method comprising the steps of: forming a layer of suboxide material (layer 206 of FIG. 2a) over the substrate (substrate 202 of FIGS. 2a-2c), the suboxide material comprised of a material selected from the group consisting of: HfSiOx, ZrSiOx, LaSiOx, YSiOx, ScSiOx, and CeSiOx; and forming a structure (layer 210 of FIG. 2c) on the layer of suboxide material. In an alternative embodiment, semiconductor device is a transistor where and the structure formed on the layer of suboxide material is a gate electrode (preferably comprised of: polycrystalline silicon, tungsten, titanium, tungsten nitride, titanium nitride, platinum, aluminum, and any combination thereof). In another alternative embodiment, the semiconductor device is a storage device where a bottom electrode is formed under and abutting the suboxide material which forms the dielectric to the storage device and the structure formed on the layer of suboxide material is the top electrode of the storage device.

摘要翻译： 本发明的一个实施例是一种形成位于半导体衬底之上的半导体器件的方法，该方法包括以下步骤：在衬底上形成低氧化物材料层（图2a的层206） 2a-2c），所述低氧化物材料由选自以下的材料组成：HfSiO x，ZrSiO x，LaSiO x，YSiO x，ScSiO x和CeSiO x; 并在低氧化物材料层上形成结构（图2c的层210）。 在替代实施例中，半导体器件是晶体管，其中形成在低氧化物材料层上的结构是栅电极（优选地包括：多晶硅，钨，钛，氮化钨，氮化钛，铂，铝和任何组合 ）。 在另一替代实施例中，半导体器件是存储器件，其中底部电极形成在与存储器件形成电介质的低氧化物材料之下并邻接，并且形成在低氧化物材料层上的结构是存储器件的顶部电极 。

公开(公告)号：US06821835B2

公开(公告)日：2004-11-23

申请号：US10409007

申请日：2003-04-08

申请人： Glen D. Wilk

发明人： Glen D. Wilk

IPC分类号： H01L218236

CPC分类号： C23C16/42 ,  C23C16/401 ,  C23C16/56 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/31691 ,  H01L29/517

摘要： A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the semiconductor substrate (step 106 of FIG. 1); and forming a layer of high-dielectric constant material between the conductive structure and the semiconductor substrate (step 102 of FIG. 1), the layer of high-dielectric constant material is formed by supplying a gaseous silicon source and a second gaseous material which is comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof.

摘要翻译： 一种在半导体衬底上制造电子器件的方法，所述方法包括以下步骤：在所述半导体衬底上形成导电结构（图1的步骤106）; 以及在所述导电结构和所述半导体衬底之间形成高介电常数材料层（图1的步骤102），所述高介电常数材料层通过提供气态硅源和第二气态材料形成，所述气态硅源是 由选自Hf，Zr，La，Y，Sc，Ce及其任何组合的材料组成。

公开(公告)号：US06498502B2

公开(公告)日：2002-12-24

申请号：US09737365

申请日：2000-12-14

申请人： Henry L. Edwards ,  Theodore S. Moise ,  Glen D. Wilk

发明人： Henry L. Edwards ,  Theodore S. Moise ,  Glen D. Wilk

IPC分类号： G01R31302

CPC分类号： G01R31/303 ,  G01R31/312 ,  Y10S977/852

摘要： An apparatus and method for evaluating semiconductor structures and devices are provided. A method for evaluating at least one selected electrical property of a semiconductor device (201) in relation to a selected geometric dimension of the semiconductor device (201). The method further includes forming a plurality of semiconductor devices (201) on a substrate (202), the devices (201) having at least one geometric dimension, measuring the at least one electrical property of at least one of the semiconductor devices (201) using a scanning probe microscopy based technique, and determining a relationship between the measured electrical property and the selected geometric dimension of the semiconductor device (201). The method further includes evaluating at least one semiconductor fabrication process based upon the determined relationship.

摘要翻译： 提供了一种用于评估半导体结构和装置的装置和方法。 一种用于评估半导体器件（201）相对于半导体器件（201）的选定几何尺寸的至少一个所选电性能的方法。 该方法还包括在衬底（202）上形成多个半导体器件（201），所述器件（201）具有至少一个几何尺寸，测量半导体器件（201）中的至少一个的至少一个电性能， 使用基于扫描探针显微镜的技术，以及确定所测量的电性能与所述半导体器件（201）的选定几何尺寸之间的关系。 该方法还包括基于所确定的关系来评估至少一个半导体制造工艺。

公开(公告)号：US06291282B1

公开(公告)日：2001-09-18

申请号：US09500330

申请日：2000-02-08

申请人： Glen D. Wilk ,  Scott R. Summerfelt

发明人： Glen D. Wilk ,  Scott R. Summerfelt

IPC分类号： H01L218283

CPC分类号： H01L29/4966 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/6659

摘要： An embodiment of the instant invention is a method of forming a first transistor having a first gate electrode and a second transistor having a second gate electrode on a semiconductor substrate, the method comprising the steps of: forming a conductive material (step 216 of FIG. 2) insulatively disposed over the semiconductor substrate, the conductive material having a work function; and altering a portion of the conductive material (step 218 of FIG. 2) so as to change the work function of the altered conductive material, the conductive material to form the first gate electrode and the altered conductive material to form the second gate electrode. Preferably, the first transistor is an NMOS device, the second transistor is a PMOS device, and the first transistor and the second transistor form a CMOS device. The conductive material is, preferably, comprised of a conductor selected from the group consisting of: Ta, Mo, Ti and any combination thereof. Preferably, the step of altering a portion of the conductive material is comprised of: subjecting the portion of the conductive material to a plasma which incorporates a nitrogen-containing gas.

摘要翻译： 本发明的一个实施例是一种在半导体衬底上形成具有第一栅电极和第二晶体管的第一晶体管的方法，所述第一晶体管具有第二栅电极，所述方法包括以下步骤：形成导电材料（图1的步骤216）。 2）绝缘地设置在半导体衬底上，导电材料具有功函数; 并改变导电材料的一部分（图2的步骤218），以改变改变的导电材料的功函数，导电材料形成第一栅电极和改变的导电材料以形成第二栅电极。 优选地，第一晶体管是NMOS器件，第二晶体管是PMOS器件，并且第一晶体管和第二晶体管形成CMOS器件。 导电材料优选由选自Ta，Mo，Ti及其任何组合的导体组成。 优选地，改变导电材料的一部分的步骤包括：使导电材料的该部分经受含有含氮气体的等离子体。

公开(公告)号：US06248621B1

公开(公告)日：2001-06-19

申请号：US09421011

申请日：1999-10-20

申请人： Glen D. Wilk ,  John M. Anthony

发明人： Glen D. Wilk ,  John M. Anthony

IPC分类号： H01L218234

CPC分类号： B82Y10/00 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L29/882 ,  Y10S438/979

摘要： A method of forming a crystalline silicon well over a perovskite barrier layer, preferably for use in formation of a resonant tunneling diode. A silicon substrate (1) is provided of predetermined crystallographic orientation. A layer of crystallographic perovskite material (5) is formed over the silicon substrate and substantially matched to the lattice constant of the silicon substrate. A layer of crystallographic silicon (7) is formed over the perovskite layer substantially matched to the lattice constant of the perovskite layer. The perovskite layer is formed by the steps of placing the silicon substrate in a chamber and then evaporating a layer of barium strontium oxide (3) thereon with a thickness of from about three to about six Angstroms and then evaporating a layer of calcium strontium titanate (5) thereon having a thickness of from about six to about 25 Angstroms thereon in the case of a tunneling diode. A second layer of silicon oxide (9) is provided on the layer of silicon remote from the perovskite layer.

摘要翻译： 在钙钛矿阻挡层上形成晶体硅的方法，优选用于形成谐振隧穿二极管。 硅基板（1）具有预定的晶体取向。 在硅衬底上形成一层晶体钙钛矿材料（5），并且基本上与硅衬底的晶格常数匹配。 在与钙钛矿层的晶格常数基本匹配的钙钛矿层上形成一层结晶硅（7）。 钙钛矿层通过以下步骤形成：将硅衬底放置在室中，然后在其上蒸发厚度约3至约6埃的一层氧化钡钡（3），然后蒸发一层钛酸锶钙（ 在其上，在隧道二极管的情况下其上具有约6至约25埃的厚度。 第二层氧化硅（9）设置在远离钙钛矿层的硅层上。

公开(公告)号：US06797525B2

公开(公告)日：2004-09-28

申请号：US10151887

申请日：2002-05-22

申请人： Martin L. Green ,  Glen D. Wilk

发明人： Martin L. Green ,  Glen D. Wilk

IPC分类号： H01L2100

CPC分类号： H01L21/28185 ,  H01L21/02178 ,  H01L21/02263 ,  H01L21/02304 ,  H01L21/02337 ,  H01L21/28194 ,  H01L21/31612 ,  H01L21/31616 ,  H01L28/56 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A method of forming an annealed high-K metal oxide transistor gate structure is disclosed. A metal oxide layer is formed over a semiconductor substrate. The metal oxide layer undergoes a buffered annealed process in an oxygen atmosphere to anneal the metal oxide layer at or below the thermodynamic chemical equilibrium of SiO/SiO2 and at or above the thermodynamic chemical equilibrium of the metal oxide layer.

摘要翻译： 公开了一种形成退火的高K金属氧化物晶体管栅极结构的方法。 在半导体衬底上形成金属氧化物层。 金属氧化物层在氧气氛中进行缓冲退火处理，以在SiO 2 / SiO 2的热力学化学平衡或等于或高于金属氧化物层的热力学化学平衡处退火金属氧化物层。

公开(公告)号：US06734068B2

公开(公告)日：2004-05-11

申请号：US09851318

申请日：2001-05-09

申请人： Glen D. Wilk

发明人： Glen D. Wilk

IPC分类号： H01L31336

CPC分类号： H01L21/02148 ,  H01L21/02159 ,  H01L21/02266 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31604 ,  H01L21/823462 ,  H01L29/517 ,  H01L29/518

摘要： An embodiment of the instant invention is a method of forming a semiconductor device situated over a semiconductor substrate, the method comprising the steps of: forming a layer of suboxide material (layer 206 of FIG. 2a) over the substrate (substrate 202 of FIGS. 2a-2c), the suboxide material comprised of a material selected from the group consisting of: HfSiOx, ZrSiOx, LaSiOx, YSiOx, ScSiOx, and CeSiOx; and forming a structure (layer 210 of FIG. 2c) on the layer of suboxide material. In an alternative embodiment, semiconductor device is a transistor where and the structure formed on the layer of suboxide material is a gate electrode (preferably comprised of: polycrystalline silicon, tungsten, titanium, tungsten nitride, titanium nitride, platinum, aluminum, and any combination thereof. In another alternative embodiment, the semiconductor device is a storage device where a bottom electrode is formed under and abutting the suboxide material which forms the dielectric to the storage device and the structure formed on the layer of suboxide material is the top electrode of the storage device.

摘要翻译： 本发明的一个实施例是一种形成位于半导体衬底之上的半导体器件的方法，该方法包括以下步骤：在衬底上形成低氧化物材料层（图2a的层206） 2a-2c），所述低氧化物材料由选自以下的材料组成：HfSiO x，ZrSiO x，LaSiO x，YSiO x，ScSiO x和CeSiO x; 并在低氧化物材料层上形成结构（图2c的层210）。 在替代实施例中，半导体器件是晶体管，其中形成在低氧化物材料层上的结构是栅电极（优选地包括：多晶硅，钨，钛，氮化钨，氮化钛，铂，铝和任何组合 在另一替代实施例中，半导体器件是存储器件，其中底部电极形成在与存储器件形成电介质的低氧化物材料的下面并邻接，并且形成在低氧化物材料层上的结构是形成电解质的顶部电极 储存设备。

公开(公告)号：US06544875B1

公开(公告)日：2003-04-08

申请号：US09478845

申请日：2000-01-07

申请人： Glen D. Wilk

发明人： Glen D. Wilk

IPC分类号： H01L213205

CPC分类号： C23C16/42 ,  C23C16/401 ,  C23C16/56 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/31691 ,  H01L29/517

摘要： A method of fabricating an electronic device over a semiconductor substrate, the method comprising the steps of: forming a conductive structure over the semiconductor substrate (step 106 of FIG. 1); and forming a layer of high-dielectric constant material between the conductive structure and the semiconductor substrate (step 102 of FIG. 1), the layer of high-dielectric constant material is formed by supplying a gaseous silicon source and a second gaseous material which is comprised of a material selected from the group consisting of: Hf, Zr, La, Y, Sc, Ce and any combination thereof.