公开(公告)号：US11894469B2

公开(公告)日：2024-02-06

申请号：US16811549

申请日：2020-03-06

Applicant: Samsung Electronics Co., Ltd. ,  RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY

Inventor： Sanghyun Jo ,  Heejun Yang ,  Hyeonjin Shin ,  Shoujun Zheng

IPC: H01L29/00 ,  H01L29/88 ,  H01L29/267 ,  H01L29/04 ,  H01L29/06 ,  H01L29/24 ,  H01L29/417 ,  H01L29/66 ,  H01L31/032 ,  H01L29/16

CPC classification number: H01L29/882 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/267 ,  H01L29/417 ,  H01L29/66977 ,  H01L31/032

Abstract: A resonant tunneling device includes a first two-dimensional semiconductor layer including a first two-dimensional semiconductor material, a first insulating layer on the first two-dimensional semiconductor layer; and a second two-dimensional semiconductor layer on the first insulating layer and including a second two-dimensional semiconductor material of a same kind as the first two-dimensional semiconductor material.

公开(公告)号：US11876143B2

公开(公告)日：2024-01-16

申请号：US17513805

申请日：2021-10-28

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Kiwon Moon ,  Kyung Hyun Park ,  Dong Woo Park ,  Jun-Hwan Shin ,  Eui Su Lee ,  Hyun Soo Kim ,  Il Min Lee

IPC: H01L31/102 ,  H01L29/88 ,  H01L31/0304 ,  G02F2/02 ,  H03B7/08

CPC classification number: H01L31/102 ,  G02F2/02 ,  H01L29/882 ,  H01L31/03048 ,  H03B7/08 ,  G02F2203/13

Abstract: Provided is a terahertz light source device including an antenna, a plurality of wire electrodes configured to connect the antenna to a power source, a capacitor connected to the wire electrodes between the antenna and the power source, and a plurality of resonance tunneling diodes connected to the wire electrodes between the capacitor and the antenna, and configured to generate a terahertz wave by coupling with the capacitor as a parallel resonance circuit with respect to the power source.

公开(公告)号：US20230327008A1

公开(公告)日：2023-10-12

申请号：US17714260

申请日：2022-04-06

Applicant: International Business Machines Corporation

Inventor： Eunjung Cha ,  Bogdan Cezar Zota ,  Kirsten Emilie Moselund ,  Katarzyna Hnida-Gut

IPC: H01L29/778 ,  H01L29/88 ,  H01L29/15 ,  H01L29/66

CPC classification number: H01L29/7783 ,  H01L29/882 ,  H01L29/152 ,  H01L29/66462 ,  H01L29/66151 ,  H01L23/445

Abstract: One or more devices and/or methods provided herein relate to a method for fabricating a semiconductor device having a co-integrated RTD and HEMT. A semiconductor device can comprise an RTD and an HEMT that are co-integrated along a substrate. A fabrication method can comprise providing a heterostructure comprising a plurality of transistor layers of an HEMT, forming on the vertical stack a template structure comprising an opening, a cavity and a seed structure, the seed structure comprising a seed material and a seed surface, and growing a plurality of diode layers of an RTD within the cavity of the template structure from the seed surface, wherein the RTD and HEMT are co-integrated along a substrate.

公开(公告)号：US20190189436A1

公开(公告)日：2019-06-20

申请号：US16274778

申请日：2019-02-13

Applicant: Lumileds LLC

Inventor： Isaac Wildeson ,  Parijat Deb ,  Erik Charles Nelson ,  Junko Kobayashi

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/88 ,  H01L33/06 ,  H01L33/00 ,  H01L33/02 ,  H01L33/04

CPC classification number: H01L33/007 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02631 ,  H01L29/66151 ,  H01L29/66219 ,  H01L29/88 ,  H01L29/882 ,  H01L33/0025 ,  H01L33/02 ,  H01L33/04 ,  H01L33/06 ,  H01L33/325

Abstract: Described herein are methods for using remote plasma chemical vapor deposition (RP-CVD) and sputtering deposition to grow layers for light emitting devices. A method includes growing a light emitting device structure on a growth substrate, and growing a tunnel junction on the light emitting device structure using at least one of RP-CVD and sputtering deposition. The tunnel junction includes a p++ layer in direct contact with a p-type region, where the p++ layer is grown by using at least one of RP-CVD and sputtering deposition. Another method for growing a device includes growing a p-type region over a growth substrate using at least one of RP-CVD and sputtering deposition, and growing further layers over the p-type region. Another method for growing a device includes growing a light emitting region and an n-type region using at least one of RP-CVD and sputtering deposition over a p-type region.

公开(公告)号：US20180323338A1

公开(公告)日：2018-11-08

申请号：US15587269

申请日：2017-05-04

Applicant: X Development LLC

Inventor： Michael Grundmann ,  Martin F. Schubert

IPC: H01L33/06 ,  H01L33/32 ,  H01L27/15 ,  H01L25/16 ,  H01L33/00 ,  H05B33/08

CPC classification number: H01L33/06 ,  H01L25/167 ,  H01L27/156 ,  H01L29/66121 ,  H01L29/66151 ,  H01L29/66219 ,  H01L29/8618 ,  H01L29/88 ,  H01L29/882 ,  H01L33/0008 ,  H01L33/0025 ,  H01L33/0045 ,  H01L33/0075 ,  H01L33/04 ,  H01L33/32 ,  H01L33/40 ,  H05B33/0803 ,  H05B33/0845

Abstract: A light emitting diode (LED) to emit ultraviolet (UV) light includes a first n-type semiconductor region and a first p-type semiconductor region. The LED also includes an active region disposed between the first n-type semiconductor region and the first p-type semiconductor region, and in response to a bias applied across the light emitting diode, the active region emits UV light. A tunnel junction is disposed in the LED so the first p-type semiconductor region is disposed between the active region and the tunnel junction. The tunnel junction is electrically coupled to inject charge carriers into the active region through the first p-type semiconductor region. A second n-type semiconductor region is also disposed in the LED so the tunnel junction is disposed between the second n-type semiconductor region and the first p-type semiconductor region.

公开(公告)号：US09991371B2

公开(公告)日：2018-06-05

申请号：US15291607

申请日：2016-10-12

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY

Inventor： Un Jeong Kim ,  Hyo Chul Kim ,  Young Geun Roh ,  Yeon Sang Park ,  Jae Gwan Chung ,  Si Young Lee ,  Young Hee Lee

IPC: H01L29/88 ,  H01L29/73 ,  H01L29/778 ,  H01L31/119 ,  H01L29/66 ,  H01L29/739 ,  H01L29/885 ,  H01L31/032 ,  H01L31/113 ,  H01L29/16 ,  H01L29/24 ,  H01L29/41

CPC classification number: H01L29/778 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/242 ,  H01L29/413 ,  H01L29/66037 ,  H01L29/66969 ,  H01L29/7311 ,  H01L29/7391 ,  H01L29/88 ,  H01L29/882 ,  H01L29/885 ,  H01L31/032 ,  H01L31/1136

Abstract: A semiconductor device includes a substrate, a two-dimensional (2D) material layer formed on the substrate and having a first region and a second region adjacent to the first region, and a source electrode and a drain electrode provided to be respectively in contact with the first region and the second region of the 2D material layer, the second region of the 2D material layer including an oxygen adsorption material layer in which oxygen is adsorbed on a surface of the second region.

公开(公告)号：US20180040743A1

公开(公告)日：2018-02-08

申请号：US15670266

申请日：2017-08-07

Applicant: ATOMERA INCORPORATED

Inventor： ROBERT J. MEARS ,  Hideki Takeuchi ,  Marek Hytha

IPC: H01L29/88 ,  H01L29/861 ,  H01L29/66 ,  H01L29/15

CPC classification number: H01L29/7376 ,  H01L27/092 ,  H01L29/1054 ,  H01L29/152 ,  H01L29/155 ,  H01L29/157 ,  H01L29/161 ,  H01L29/36 ,  H01L29/66007 ,  H01L29/6603 ,  H01L29/66121 ,  H01L29/66151 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/78 ,  H01L29/7842 ,  H01L29/8618 ,  H01L29/882

Abstract: A semiconductor device including at least one double-barrier resonant tunneling diode (DBRTD) is provided. The at least one DBRTD may include a first doped semiconductor layer, and a first barrier layer on the first doped semiconductor layer and including a superlattice. The DBRTD may further include a first intrinsic semiconductor layer on the first barrier layer, a second barrier layer on the first intrinsic semiconductor layer and also including the superlattice, a second intrinsic semiconductor layer on the second barrier layer, a third barrier layer on the second intrinsic semiconductor layer and also including the superlattice. A third intrinsic semiconductor layer may be on the third barrier layer, a fourth barrier layer may be on the third intrinsic semiconductor layer and also including the superlattice, a second doped semiconductor layer on the fourth barrier layer.

公开(公告)号：US20170345898A1

公开(公告)日：2017-11-30

申请号：US15536706

申请日：2015-12-01

Applicant: Nokia Technologies Oy

Inventor： Michael ASTLEY

IPC: H01L29/08 ,  C01B21/064 ,  C01B32/182 ,  H01L29/20 ,  H01L29/16 ,  H01L29/73 ,  H01L29/76 ,  B82Y10/00 ,  H01L29/88

CPC classification number: H01L29/0895 ,  B82Y10/00 ,  C01B21/064 ,  C01B32/182 ,  C01P2006/40 ,  H01L29/1606 ,  H01L29/2003 ,  H01L29/7311 ,  H01L29/7613 ,  H01L29/882 ,  Y10S977/734 ,  Y10S977/831 ,  Y10S977/937

Abstract: An apparatus comprising: a fermion source nanolayer (90); a first insulating nanolayer (92); a fermion transport nanolayer (94); a second insulating nanolayer (96); a fermion sink nanolayer (98); a first contact for applying a first voltage to the fermion source nanolayer; a second contact for applying a second voltage to the fermion sink nanolayer; and a transport contact for enabling an electric current via the fermion transport nanolayer. In a particular example, the apparatus comprises three graphene sheets (90, 94, 98) interleaved with two-dimensional Boron-Nitride (hBN) layers (92, 96).

公开(公告)号：US20140167098A1

公开(公告)日：2014-06-19

申请号：US14109478

申请日：2013-12-17

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Zhiyuan Cheng ,  Calvin Sheen

IPC: H01L27/11

CPC classification number: H03M1/12 ,  B82Y10/00 ,  G06F1/04 ,  G11C11/16 ,  G11C11/161 ,  H01L21/0237 ,  H01L21/02521 ,  H01L21/02554 ,  H01L21/0256 ,  H01L21/02565 ,  H01L21/02568 ,  H01L21/02636 ,  H01L27/0629 ,  H01L27/0641 ,  H01L27/11 ,  H01L27/24 ,  H01L29/04 ,  H01L29/0895 ,  H01L29/122 ,  H01L29/267 ,  H01L29/36 ,  H01L29/7376 ,  H01L29/7378 ,  H01L29/7786 ,  H01L29/882 ,  H03K5/2427 ,  Y10S438/979

Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.

Abstract translation: 结构包括设置在第一和第二晶格失配的半导体材料上的隧道装置。 方法实施方案包括在晶格不匹配的材料上形成隧穿装置。

公开(公告)号：US20120309113A1

公开(公告)日：2012-12-06

申请号：US13544661

申请日：2012-07-09

Applicant: Zhiyuan Cheng ,  Calvin Sheen

Inventor： Zhiyuan Cheng ,  Calvin Sheen

IPC: H01L43/06 ,  H01L21/20

CPC classification number: H03M1/12 ,  B82Y10/00 ,  G06F1/04 ,  G11C11/16 ,  G11C11/161 ,  H01L21/0237 ,  H01L21/02521 ,  H01L21/02554 ,  H01L21/0256 ,  H01L21/02565 ,  H01L21/02568 ,  H01L21/02636 ,  H01L27/0629 ,  H01L27/0641 ,  H01L27/11 ,  H01L27/24 ,  H01L29/04 ,  H01L29/0895 ,  H01L29/122 ,  H01L29/267 ,  H01L29/36 ,  H01L29/7376 ,  H01L29/7378 ,  H01L29/7786 ,  H01L29/882 ,  H03K5/2427 ,  Y10S438/979

Abstract: Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.

Abstract translation: 结构包括设置在第一和第二晶格失配的半导体材料上的隧道装置。 方法实施方案包括在晶格不匹配的材料上形成隧穿装置。