公开(公告)号：US20070104040A1

公开(公告)日：2007-05-10

申请号：US11532102

申请日：2006-09-15

Applicant: Jia-Horng Shieh ,  Jin-Bin Yang

Inventor： Jia-Horng Shieh ,  Jin-Bin Yang

IPC: G11B21/08

CPC classification number: G11B20/10527 ,  G11B27/105 ,  G11B2020/10694

Abstract: A data buffering method used when performing a read operation on an optical storage medium is disclosed. After a first data unit having an unidentifiable and temporarily undeducible ID address is reproduced through the read operation, the method starts storing the first data unit and subsequently reproduced data units into a buffer memory in turn. After a second ID address of a second data unit of the subsequently reproduced data units is identified, the method deduces a target memory address of the buffer memory according to the second ID address and a target ID address. A buffer start pointer is then set according to the deduced target memory address.

Abstract translation: 公开了一种在光学存储介质上执行读取操作时使用的数据缓冲方法。 在通过读取操作再现具有不可识别且暂时不可消除的ID地址的第一数据单元之后，该方法开始依次将第一数据单元和随后的再现数据单元存储到缓冲存储器中。 在识别出随后再现的数据单元的第二数据单元的第二ID地址之后，该方法根据第二ID地址和目标ID地址推断缓冲存储器的目标存储器地址。 然后根据推导的目标存储器地址设置缓冲区起始指针。

公开(公告)号：US20050120285A1

公开(公告)日：2005-06-02

申请号：US10969949

申请日：2004-10-22

Applicant: Yi-Kwang Hu ,  Jin-Bin Yang ,  Hsi-Chia Chang

Inventor： Yi-Kwang Hu ,  Jin-Bin Yang ,  Hsi-Chia Chang

IPC: H03M13/15 ,  H03M13/29 ,  H03M13/00

CPC classification number: H03M13/611 ,  H03M13/1515 ,  H03M13/29 ,  H03M13/2924

Abstract: The invention relates to an encoding method for encoding a codeword to obtain a parity code. The code is embedded in the codeword and divides the codeword to have intermediate symbol locations between a first and a second set of data symbols. Each data symbol forms a coefficient. The first and the second set of data symbols and the parity code respectively form a first polynomial (M1(x)), a second polynomial (M2(x)), and a parity code polynomial (R(x)). The method comprises: first, designing a first code generator polynomial (G1(x)); next, dividing M1(x)x4 by G1(x) to obtain a first remainder polynomial (R1(x)); next, generating a second code generator polynomial (G2(x)) from G1(x); next, generating a third polynomial (M3(x)); next, dividing M3(x)x4 by G2(x) to obtain a second remainder polynomial (R2(x)); next, performing an adding procedure to R1(x) and R2(x) to obtain R(x); finally, obtaining the parity code from each coefficient of R(x).

Abstract translation: 本发明涉及用于编码码字以获得奇偶校验码的编码方法。 代码被嵌入在码字中并且将码字划分成在第一和第二组数据符号之间具有中间符号位置。 每个数据符号形成系数。 第一和第二组数据符号和奇偶校验码分别形成第一多项式（M 1（x）），第二多项式（M 2（x））和奇偶码多项式（R（x）））。 该方法包括：首先设计第一代码生成多项式（G 1（x））; 接下来，将M 1（x）x 4+除以G 1（x）以获得第一余数多项式（R 1（x））; 接下来，从G 1（x）生成第二代码生成多项式（G 2（x））; 接下来，生成第三多项式（M 3（x））; 接下来，将M 3（x）×4×4除以G 2（x）以获得第二余数多项式（R 2（x））; 接下来，对R 1（x）和R 2（x）执行加法以获得R（x）; 最后，从R（x）的每个系数获得奇偶校验码。

公开(公告)号：US09171639B2

公开(公告)日：2015-10-27

申请号：US13397989

申请日：2012-02-16

Applicant: Rei-Fu Huang ,  Jin-Bin Yang

Inventor： Rei-Fu Huang ,  Jin-Bin Yang

IPC: G01R31/02 ,  G11C17/18 ,  H01L23/525

CPC classification number: G11C17/18 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An eFuse with at least one fuse unit is provided. The fuse unit includes a first common node providing a first reference voltage, a second common node providing a second reference voltage, at least one fuse coupled to the first common node, and a determining unit coupled between the fuse and the second common node, generating an output signal indicating whether the fuse is blown or not according to a first condition in a normal mode and a second condition in a test mode.

Abstract translation: 提供至少一个保险丝单元的eFuse。 保险丝单元包括提供第一参考电压的第一公共节点，提供第二参考电压的第二公共节点，耦合到第一公共节点的至少一个熔丝以及耦合在熔丝和第二公共节点之间的确定单元，产生 根据正常模式中的第一状态和测试模式中的第二状态，指示熔丝是否熔断的输出信号。

公开(公告)号：US20130099835A1

公开(公告)日：2013-04-25

申请号：US13280341

申请日：2011-10-25

Applicant: You-Wen Chang ,  Yi-Sung Chan ,  Jin-Bin Yang ,  Chang-Po Ma

Inventor： You-Wen Chang ,  Yi-Sung Chan ,  Jin-Bin Yang ,  Chang-Po Ma

IPC: H03L7/00

CPC classification number: G11B7/126 ,  G11B20/10222 ,  G11B2220/2537 ,  H03K5/26

Abstract: An exemplary calibration apparatus includes a detecting circuit and a calibrating circuit. The detecting circuit is arranged for generating a detection result by detecting relationship between edges of a plurality of signals generated from a plurality of signal sources, wherein at least one of the edges is a falling edge. The calibrating circuit is coupled to the detecting circuit, and arranged for calibrating at least one of the signal sources according to the detection result. An exemplary calibration method includes the following steps: generating a detection result by detecting relationship between edges of a plurality of signals generated from a plurality of signal sources, wherein at least one of the edges is a falling edge; and calibrating at least one of the signal sources according to the detection result.

Abstract translation: 示例性的校准装置包括检测电路和校准电路。 检测电路被布置成通过检测从多个信号源产生的多个信号的边缘之间的关系来产生检测结果，其中至少一个边缘是下降沿。 校准电路耦合到检测电路，并被安排用于根据检测结果校准至少一个信号源。 示例性校准方法包括以下步骤：通过检测从多个信号源产生的多个信号的边缘之间的关系来产生检测结果，其中至少一个边缘是下降沿; 并根据检测结果校准至少一个信号源。

公开(公告)号：US20110246138A1

公开(公告)日：2011-10-06

申请号：US12912732

申请日：2010-10-26

Applicant: Yi-Jen Chung ,  Chi-Pei Huang ,  Ching-Ning Chiu ,  Jin-Bin Yang

Inventor： Yi-Jen Chung ,  Chi-Pei Huang ,  Ching-Ning Chiu ,  Jin-Bin Yang

IPC: G06F11/30 ,  G06F15/00

CPC classification number: G06F13/4072

Abstract: A hardware status detecting circuit for detecting a hardware status of a target apparatus includes a plurality of hardware status detectors operating in response to the hardware status of the target apparatus, and a signal processing unit coupled to the hardware status detectors for generating a hardware status detecting signal having information of operational statuses of the hardware status detectors embedded therein.

Abstract translation: 用于检测目标设备的硬件状态的硬件状态检测电路包括响应于目标设备的硬件状态操作的多个硬件状态检测器，以及耦合到硬件状态检测器的信号处理单元，用于产生硬件状态检测 信号，其具有嵌入其中的硬件状态检测器的操作状态信息。

公开(公告)号：US07885154B2

公开(公告)日：2011-02-08

申请号：US11366476

申请日：2006-03-03

Applicant: Jin-Bin Yang ,  Meng-Ta Yang

Inventor： Jin-Bin Yang ,  Meng-Ta Yang

IPC: G11B7/00

CPC classification number: G11B20/10009 ,  G11B20/10027

Abstract: An apparatus for controlling discrete data in a disk overwrite area or a power calibration area comprises a signal-processing unit, an address-processing unit, a control signal-processing unit, a clock recovery circuit, a signal-processing unit parameter control unit, and a clock recovery circuit parameter control unit, wherein the control signal-processing unit uses a message produced by a data on the disc to determine the control signals such as hold, load, or increasing bandwidth for holding, loading, and increasing the bandwidth of the parameters for processing the related circuits (such as the circuit of the signal-processing unit or the clock recovery circuit) of the discrete data produced between the two data clusters, so as to increase the convergent speed of the circuits for assuring the accuracy of reading data.

Abstract translation: 用于控制盘重写区域或功率校准区域中的离散数据的装置包括信号处理单元，地址处理单元，控制信号处理单元，时钟恢复电路，信号处理单元参数控制单元， 以及时钟恢复电路参数控制单元，其中控制信号处理单元使用由盘上的数据产生的消息来确定诸如保持，加载或增加用于保持，加载和增加带宽的带宽的控制信号 用于处理在两个数据簇之间产生的离散数据的相关电路（例如信号处理单元或时钟恢复电路的电路）的参数，以便增加电路的收敛速度以确保准确度 阅读数据。

公开(公告)号：US07567054B2

公开(公告)日：2009-07-28

申请号：US11307962

申请日：2006-03-01

Applicant: Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

Inventor： Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

IPC: H02P27/04

CPC classification number: G11B19/24 ,  H02P6/08

Abstract: A control circuit and a control method of controlling a rotation frequency of a spindle in an optical disc drive, the control circuit comprising: a spindle controller, electrically coupled to the spindle, for driving the spindle to rotate an optical disc according to a rotation control signal; a detector, electrically coupled to the spindle controller, for detecting the rotation frequency and for generating detecting signals; a frequency-adjusting module, electrically coupled to the detector, for adjusting at least one of the detecting signals to reduce a rotation frequency difference between detecting signals; a signal selector, electrically coupled to the frequency-adjusting module, for receiving output signals generated from the frequency-adjusting module and then outputting the rotation control signal.

Abstract translation: 一种控制电路和控制光盘驱动器中主轴的旋转频率的控制方法，所述控制电路包括：主轴控制器，其电耦合到所述主轴，用于驱动所述主轴以根据旋转控制旋转光盘 信号; 电耦合到主轴控制器的检测器，用于检测旋转频率并产生检测信号; 频率调节模块，电耦合到所述检测器，用于调整所述检测信号中的至少一个以减小检测信号之间的旋转频率差; 电耦合到频率调节模块的信号选择器，用于接收从频率调节模块产生的输出信号，然后输出旋转控制信号。

公开(公告)号：US20070205737A1

公开(公告)日：2007-09-06

申请号：US11307962

申请日：2006-03-01

Applicant: Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

Inventor： Yu-Hsuan Lin ,  Jin-Bin Yang ,  Chih-Ching Chen ,  Gwo-Huei Wu

IPC: G05B19/10

CPC classification number: G11B19/24 ,  H02P6/08

Abstract: A control circuit and a control method of controlling a rotation frequency of a spindle in an optical disc drive, the control circuit comprising: a spindle controller, electrically coupled to the spindle, for driving the spindle to rotate an optical disc according to a rotation control signal; a detector, electrically coupled to the spindle controller, for detecting the rotation frequency and for generating detecting signals; a frequency-adjusting module, electrically coupled to the detector, for adjusting at least one of the detecting signals to reduce a rotation frequency difference between detecting signals; a signal selector, electrically coupled to the frequency-adjusting module, for receiving output signals generated from the frequency-adjusting module and then outputting the rotation control signal.

Abstract translation: 一种控制电路和控制光盘驱动器中主轴的旋转频率的控制方法，所述控制电路包括：主轴控制器，其电耦合到所述主轴，用于驱动所述主轴以根据旋转控制旋转光盘 信号; 电耦合到主轴控制器的检测器，用于检测旋转频率并产生检测信号; 频率调节模块，电耦合到所述检测器，用于调整所述检测信号中的至少一个以减小检测信号之间的旋转频率差; 电耦合到频率调节模块的信号选择器，用于接收从频率调节模块产生的输出信号，然后输出旋转控制信号。

公开(公告)号：US20070133367A1

公开(公告)日：2007-06-14

申请号：US11306039

申请日：2005-12-14

Applicant: Wei-Hsiang Tseng ,  Hsin-Cheng Chen ,  Jin-Bin Yang

Inventor： Wei-Hsiang Tseng ,  Hsin-Cheng Chen ,  Jin-Bin Yang

IPC: G11B20/10

CPC classification number: G11B20/10009 ,  G11B20/10222 ,  G11B2020/1287

Abstract: An information recording device and a related method are disclosed. The information recording device and the related method are capable of adjusting a phase error between a first synchronization signal and a second synchronization signal, where the first synchronization signal is synchronous to a location on a recording medium, the second synchronization signal is synchronous to a data pattern to be written onto the recording medium, and the data pattern comprise a sync pattern and a non-sync pattern. The information recording device includes a phase detector for detecting the phase error between the first synchronization signal and the second synchronization signal; and a controller, electrically connected to the phase detector, for adjusting the length of the non-sync pattern of the data pattern according to the phase error, thereby making the second synchronization signal substantially synchronized with the first synchronization signal.

Abstract translation: 公开了一种信息记录装置和相关方法。 信息记录装置和相关方法能够调整第一同步信号和第二同步信号之间的相位误差，其中第一同步信号与记录介质上的位置同步，第二同步信号与数据同步 模式被写入到记录介质上，并且数据模式包括同步模式和非同步模式。 信息记录装置包括用于检测第一同步信号和第二同步信号之间的相位误差的相位检测器; 以及控制器，电连接到相位检测器，用于根据相位误差调整数据模式的非同步模式的长度，从而使第二同步信号与第一同步信号基本上同步。

公开(公告)号：US20070127343A1

公开(公告)日：2007-06-07

申请号：US11164749

申请日：2005-12-05

Applicant: Wei-Hsiang Tseng ,  Jin-Bin Yang ,  Hsin-Cheng Chen

Inventor： Wei-Hsiang Tseng ,  Jin-Bin Yang ,  Hsin-Cheng Chen

IPC: G11B7/0045

CPC classification number: G11B20/10222 ,  G11B7/00456 ,  G11B7/126 ,  G11B20/1403 ,  G11B2020/1287

Abstract: An information recording device and related method are disclosed. The information recording device is capable of adjusting a phase difference between a first synchronization signal and a second synchronization signal. The information recording device includes an encoder for generating a run-length of an encoded data; a phase detector for detecting the phase difference between the first and the second synchronous signals; a shift offset controller, electrically connected to the phase detector, for generating a shift information according to the phase difference; and a write pulse generator, electrically connected to the encoder and the shift offset controller, for generating a write pulse signal according to the run-length of the encoded data and the shift information, thereby making the first synchronous signal synchronized with the second synchronous signal.

Abstract translation: 公开了一种信息记录装置及相关方法。 信息记录装置能够调整第一同步信号和第二同步信号之间的相位差。 信息记录装置包括用于生成编码数据的游程长度的编码器; 相位检测器，用于检测第一和第二同步信号之间的相位差; 电连接到所述相位检测器的移位偏移控制器，用于根据所述相位差产生移位信息; 以及写入脉冲发生器，电连接到编码器和偏移偏移控制器，用于根据编码数据的行程长度和移位信息产生写脉冲信号，从而使第一同步信号与第二同步信号同步 。