公开(公告)号：US5867007A

公开(公告)日：1999-02-02

申请号：US922561

申请日：1997-09-03

申请人： Dong-Hwan Kim

发明人： Dong-Hwan Kim

IPC分类号： H01M10/44 ,  H01M10/48 ,  H02J7/00 ,  H01M10/46

CPC分类号： H01M10/482 ,  H02J7/0024

摘要： A battery selection circuit for dual battery packs discharges the batteries in a stable way without regard to voltage differences. Also, if one of the batteries is installed, the battery is effectively selected to prolong battery life. When this circuit is adopted in a notebook computer, battery usage time is substantially increased. The battery selection circuit includes a battery detector for sensing the existence of the first and second battery packs and for producing the detect signals corresponding thereto. These detect signals are provided to a microcontroller to produce first and second battery discharge enable signals. In response to the first and second battery discharge enable signals, first and second electronic switches respectively connect each power supply line from the first and second batteries to a power supply circuit of the device. Reverse current blocking diodes are provided in series with the first and second switches, and a low resistive current path circuit is provided in parallel with the reverse current blocking diodes. The first switch and second switch as well as the low resistive current path circuit may include MOS FET transistors. Advantageously, a control circuit including logic gates is provided for opening the low resistive current path circuit when both the first and second batteries are detected, and for closing the corresponding low resistive current path circuit when one of the first and second batteries is detected.

摘要翻译： 用于双电池组的电池选择电路以稳定的方式放电，而不考虑电压差。 此外，如果安装了其中一个电池，则可有效选择电池以延长电池寿命。 当笔记本电脑采用该电路时，电池使用时间大大增加。 电池选择电路包括用于感测第一和第二电池组的存在并用于产生与其相对应的检测信号的电池检测器。 这些检测信号被提供给微控制器以产生第一和第二电池放电使能信号。 响应于第一和第二电池放电使能信号，第一和第二电子开关分别将来自第一和第二电池的每个电源线连接到该装置的电源电路。 与第一和第二开关串联提供反向电流阻断二极管，并且与反向电流阻断二极管并联提供低电阻电流通路电路。 第一开关和第二开关以及低电阻电流路径电路可以包括MOS FET晶体管。 有利地，提供包括逻辑门的控制电路，用于在检测到第一和第二电池两者时打开低电阻电流路径电路，并且当检测到第一和第二电池之一时闭合相应的低电阻电流通路电路。

公开(公告)号：US08633660B2

公开(公告)日：2014-01-21

申请号：US13028628

申请日：2011-02-16

申请人： Gye-Hyun Cho ,  Min-Ho Jung ,  Sung-Yun Park ,  Dong-Hwan Kim

发明人： Gye-Hyun Cho ,  Min-Ho Jung ,  Sung-Yun Park ,  Dong-Hwan Kim

IPC分类号： H05B37/02 ,  H02M7/217

CPC分类号： H02M1/083 ,  H05B33/0818 ,  Y02B20/346 ,  Y02B20/348

摘要： The present invention relates to a switching operation control device of a power switch, an LED light emitting device including the same, and a control method thereof. The control device detects a zero crossing time when a voltage at an input end of the power switch becomes a zero voltage, generates a reference signal that is synchronized with the voltage at the input end of the power switch by using the detected zero crossing time, and compensates the generated reference signal with a first voltage that is greater than the zero voltage during a blocking period corresponding to the zero crossing time.

摘要翻译： 本发明涉及一种电源开关的开关操作控制装置，包括该开关操作控制装置的LED发光装置及其控制方法。 当电源开关输入端的电压变为零电压时，控制装置检测过零时间，通过使用检测到的过零时间产生与电源开关输入端的电压同步的参考信号， 并且在对应于过零时间的阻塞期间内用大于零电压的第一电压来补偿所产生的参考信号。

公开(公告)号：US08633523B2

公开(公告)日：2014-01-21

申请号：US13585549

申请日：2012-08-14

申请人： Jin-Woo Park ,  Dong-Hwan Kim

发明人： Jin-Woo Park ,  Dong-Hwan Kim

IPC分类号： H01L29/08 ,  H01L29/417 ,  H01L29/786 ,  G02F1/061

CPC分类号： H01L29/78696 ,  G09G3/3208 ,  H01L27/0705 ,  H01L29/41733

摘要： A thin film transistor which may be included in a pixel circuit includes: a substrate; a semiconductor layer formed on the substrate and including a source region, a first drain region spaced apart from the source region by a first current path, and a second drain region spaced apart from the source region by a second current path having a length different from that of the first current path; a gate electrode insulated from the semiconductor layer by a gate insulating layer; a source electrode connected to the source region of the semiconductor layer; a first drain electrode connected to the first drain region of the semiconductor layer; and a second drain electrode connected to the second drain region of the semiconductor layer. Currents having different magnitudes may be simultaneously provided through the first current path and the second current path.

摘要翻译： 可以包括在像素电路中的薄膜晶体管包括：衬底; 半导体层，其形成在所述基板上，并且包括源极区域，通过第一电流路径与所述源极区域间隔开的第一漏极区域和与所述源极区域间隔开的第二漏极区域，所述第二电流路径的长度不同于 第一条当前路径; 通过栅极绝缘层与半导体层绝缘的栅电极; 源极连接到半导体层的源极区; 连接到半导体层的第一漏区的第一漏电极; 以及连接到半导体层的第二漏区的第二漏电极。 可以通过第一电流路径和第二电流路径同时提供具有不同幅度的电流。

公开(公告)号：US20100240725A1

公开(公告)日：2010-09-23

申请号：US12739870

申请日：2008-10-31

申请人： Yeong Geon Lee ,  Soo-Jung Choi ,  Tae-Kyung Kang ,  Mi-Jeong Seo ,  Chang-Yong Shin ,  Kyung-Seok Lee ,  Gook-Jun Ahn ,  Seul-Min Choi ,  Yong-Duck Kim ,  Dong-Hwan Kim ,  Kyung-Koo Kang ,  Hyun-Joo Shim ,  Dong-Sung Kim ,  Byoung-Ok Ahn ,  Moo-Hi Yoo

发明人： Yeong Geon Lee ,  Soo-Jung Choi ,  Tae-Kyung Kang ,  Mi-Jeong Seo ,  Chang-Yong Shin ,  Kyung-Seok Lee ,  Gook-Jun Ahn ,  Seul-Min Choi ,  Yong-Duck Kim ,  Dong-Hwan Kim ,  Kyung-Koo Kang ,  Hyun-Joo Shim ,  Dong-Sung Kim ,  Byoung-Ok Ahn ,  Moo-Hi Yoo

IPC分类号： A61K31/4178 ,  C07D307/87 ,  A61K31/343 ,  A61P15/00 ,  C07D405/06 ,  A61K31/4155 ,  C07D409/04 ,  A61K31/381

CPC分类号： C07D307/87 ,  C07D405/06 ,  C07D409/04 ,  C07D409/06

摘要： Disclosed herein are novel 1,3-dihydro-5-isobenzofurancarbonitrile derivatives represented by Formula 1, or pharmaceutically acceptable salts thereof. Also disclosed is a pharmaceutical composition for treating or preventing premature ejaculation including the compound. The 1,3-dihydro-5-isobenzofurancarbonitrile derivatives have a short half-life and inhibit the ejaculation process by selectively inhibiting serotonin reuptake via a serotonin reuptake transporter present in a presynaptic neuron. Thus, the compounds are useful in the treatment and prevention of premature ejaculation.

摘要翻译： 本文公开了由式1表示的新的1,3-二氢-5-异苯并呋喃腈衍生物或其药学上可接受的盐。 还公开了用于治疗或预防早泄的药物组合物，包括该化合物。 1,3-二氢-5-异苯并呋喃腈衍生物具有短的半衰期，并通过选择性地通过存在于突触前神经元中的5-羟色胺再摄取转运蛋白选择性抑制5-羟色胺再摄取来抑制射精过程。 因此，这些化合物可用于治疗和预防早泄。

公开(公告)号：US07579237B2

公开(公告)日：2009-08-25

申请号：US11653362

申请日：2007-01-16

申请人： Sang-Kyoung Lee ,  Jin-Hong Kim ,  Dong-Hwan Kim ,  Won-Sik Shin ,  Woong Lee

发明人： Sang-Kyoung Lee ,  Jin-Hong Kim ,  Dong-Hwan Kim ,  Won-Sik Shin ,  Woong Lee

IPC分类号： H01L21/336

CPC分类号： H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/4925

摘要： A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the semiconductor substrate, forming a first preliminary polysilicon layer in communication with the tunneling insulation layer and the device isolation regions, forming a preliminary amorphous silicon layer on the first preliminary silicon layer, forming a second preliminary polysilicon layer on the preliminary amorphous silicon layer, and patterning the second preliminary polysilicon layer, the preliminary amorphous silicon layer, and the first preliminary polysilicon layer to form a floating gate layer.

摘要翻译： 一种制造非易失性存储器件的方法包括在半导体衬底中形成多个器件隔离区域，在半导体衬底上形成隧道绝缘层，形成与隧道绝缘层和器件隔离区域连通的第一初步多晶硅层， 在所述第一初步硅层上形成初步非晶硅层，在所述初步非晶硅层上形成第二初步多晶硅层，以及构图所述第二初步多晶硅层，所述初步非晶硅层和所述第一初步多晶硅层，以形成浮 门层

公开(公告)号：US07432745B2

公开(公告)日：2008-10-07

申请号：US11218384

申请日：2005-09-02

申请人： Jong-Tae Hwang ,  Yun-Kee Lee ,  Dong-Hwan Kim

发明人： Jong-Tae Hwang ,  Yun-Kee Lee ,  Dong-Hwan Kim

IPC分类号： H03K3/00

CPC分类号： H03K17/162 ,  H03K17/063 ,  H03K2217/0018

摘要： A high voltage gate driver circuit according to an embodiment of the present invention controls an operational range of an output signal of a level shifter to be appropriate for an operational range of a reshaper through a VIV converter. Even though the voltage range of the signal which is input from the high voltage gate driver circuit to the level shifter is different from the operational range of the reshaper, the input signal can always be recognized exactly regardless of the VTH voltage of the reshaper by controlling the operational range of the signal through the VIV converter. In addition, incorrect operation of the circuit can be prevented by erasing a common mode noise which is input with the input signal.

摘要翻译： 根据本发明实施例的高电压栅极驱动器电路通过VIV转换器控制电平移位器的输出信号的操作范围，以适合于整流器的工作范围。 即使从高电压栅极驱动电路向电平移位器输入的信号的电压范围与整流器的工作范围不同，也可以总是通过控制通过整流器的VTH电压来精确地识别输入信号 通过VIV转换器的信号的工作范围。 此外，通过擦除用输入信号输入的共模噪声可以防止电路的不正确的操作。

公开(公告)号：US07420431B2

公开(公告)日：2008-09-02

申请号：US11607357

申请日：2006-12-01

申请人： Jong-Tae Hwang ,  Dae-Ho Kim ,  Moon-Sang Jung ,  Dong-Hwan Kim

发明人： Jong-Tae Hwang ,  Dae-Ho Kim ,  Moon-Sang Jung ,  Dong-Hwan Kim

IPC分类号： H03K3/02

CPC分类号： H03K4/502

摘要： An RC oscillator integrated circuit includes: an active current mirror connected to an external resistor, for receiving a current signal corresponding to a voltage signal applied to the external resistor, performing 1/N-times division of the received current signal according to an input clock signal, and generating a 1/N-times current signal; an oscillation circuit for generating an output voltage corresponding to a charging- or discharging-operation of a capacitor via a current path formed by the active current mirror; a feedback switching circuit for controlling a charging- or discharging-path of the capacitor by a feedback of an output signal Vo of the oscillation circuit; and a divider for generating not only a first clock signal capable of driving the active current mirror according to the output signal of the oscillation circuit, but also a second output clock signal having a compensated mismatch of the active current mirror.

摘要翻译： RC振荡器集成电路包括：连接到外部电阻器的有源电流镜，用于接收与施加到外部电阻器的电压信号相对应的电流信号，根据输入时钟执行接收电流信号的1 / N次分频 信号，并产生1 / N倍电流信号; 振荡电路，用于经由由有源电流镜形成的电流路径产生对应于电容器的充电或放电操作的输出电压; 反馈开关电路，用于通过所述振荡电路的输出信号Vo的反馈来控制所述电容器的充电或放电路径; 以及用于根据振荡电路的输出信号产生能够驱动有源电流镜的第一时钟信号的分频器，还产生具有有源电流镜的补偿失配的第二输出时钟信号。

公开(公告)号：US07372528B2

公开(公告)日：2008-05-13

申请号：US10854850

申请日：2004-05-27

申请人： Jin Jeon ,  Jin-Suk Park ,  Dong-Hwan Kim ,  Kyo-Seop Choo ,  Yong-Ho Yang ,  Ji-Hye Moon ,  Won-Kyu Lee ,  Jun-Ho Song

发明人： Jin Jeon ,  Jin-Suk Park ,  Dong-Hwan Kim ,  Kyo-Seop Choo ,  Yong-Ho Yang ,  Ji-Hye Moon ,  Won-Kyu Lee ,  Jun-Ho Song

IPC分类号： G02F1/1333

CPC分类号： G02F1/136213 ,  G02F2001/136218

摘要： An array substrate includes a transparent substrate, pixel electrodes, switching devices, a data line, a gate line and a light blocking pattern. The light blocking pattern corresponding to a storage electrode is disposed on the transparent substrate, and the light blocking pattern blocks a light leaked from a space between the pixel electrodes. The pixel electrodes are spaced apart from the light blocking pattern by a first distance. The data line is spaced apart from the light blocking pattern by a second distance, and the data line is disposed under a region between the pixel electrodes. The data line is electrically connected to the source electrode, and the data line has a first width. The gate line is electrically connected to the gate electrode to turn on/off the switching devices. Therefore, a black matrix is not required, thereby enhancing an aperture ratio.

摘要翻译： 阵列基板包括透明基板，像素电极，开关元件，数据线，栅极线和遮光图案。 对应于存储电极的遮光图案设置在透明基板上，并且遮光图案阻挡从像素电极之间的空间泄漏的光。 像素电极与遮光图案间隔开第一距离。 数据线与遮光图案隔开第二距离，数据线设置在像素电极之间的区域之下。 数据线与源电极电连接，数据线具有第一宽度。 栅极线电连接到栅电极，以便开/关开关器件。 因此，不需要黑矩阵，从而提高孔径比。

公开(公告)号：US07323825B2

公开(公告)日：2008-01-29

申请号：US11607358

申请日：2006-12-01

申请人： Jong-Tae Hwang ,  Dae-Ho Kim ,  Moon-Sang Jung ,  Dong-Hwan Kim

发明人： Jong-Tae Hwang ,  Dae-Ho Kim ,  Moon-Sang Jung ,  Dong-Hwan Kim

IPC分类号： H05B37/02

CPC分类号： H05B41/2985 ,  H05B41/2981 ,  H05B41/2986

摘要： A ballast integrated circuit (IC) for driving a first switching element and a second switching element includes: a variable gain amplifier (VGA) connected to a first input terminal connected to a resistor, for generating an output current signal according to a resistance value of the resistor and a gain control signal; a preheating/ignition controller connected to a second input terminal connected to a capacitor, for generating an output current signal and an output voltage signal acting as the gain control signal according to a voltage of the second input terminal; an active zero-voltage controller for generating a hard-switching current signal and an active zero-voltage switching current signal, such that it adjusts the voltage of the second input terminal according to switching states of the first switching element and the second switching element; an oscillator for generating an oscillation signal upon receiving the output current signal from the variable gain amplifier (VGA); and a dead-time controller for receiving the voltage signal of the second input terminal and an output signal of the oscillator, adjusting a dead time using the received signals, and at the same time generating driving signals of the first and second switching elements.

摘要翻译： 用于驱动第一开关元件和第二开关元件的镇流器集成电路（IC）包括：连接到连接到电阻器的第一输入端子的可变增益放大器（VGA），用于根据电阻值的电阻值产生输出电流信号 电阻和增益控制信号; 连接到连接到电容器的第二输入端子的预热/点火控制器，用于根据第二输入端子的电压产生作为增益控制信号的输出电流信号和输出电压信号; 用于产生硬切换电流信号和有效零电压开关电流信号的有源零电压控制器，使得其根据第一开关元件和第二开关元件的开关状态来调节第二输入端子的电压; 用于在从可变增益放大器（VGA）接收输出电流信号时产生振荡信号的振荡器; 以及用于接收第二输入端子的电压信号和振荡器的输出信号的死区时间控制器，使用接收信号调整死区时间，同时产生第一和第二开关元件的驱动信号。

公开(公告)号：US07254064B2

公开(公告)日：2007-08-07

申请号：US11356620

申请日：2006-02-17

申请人： Dong-Hwan Kim ,  Yeong-Taek Lee

发明人： Dong-Hwan Kim ,  Yeong-Taek Lee

IPC分类号： G11C7/10

CPC分类号： G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/24 ,  G11C16/26 ,  G11C16/32 ,  G11C16/3459 ,  G11C2211/5642

摘要： There is provided a flash memory device with multi-level cell and a reading and programming method thereof. The flash memory device with multi-level cell includes a memory cell array, a unit for precharging bit line, a bit line voltage supply circuit for supplying a voltage to the bit line, and first to third latch circuits each of which performs different function from each other. The reading and programming methods are performed by LSB and MSB reading and programming operations. A reading method in the memory device is achieved by reading an LSB two times and by reading an MSB one time. A programming method is achieved by programming an LSB one time and programming an MSB one time. Data having multi-levels can be programmed into memory cells by two times programming operations.

摘要翻译： 提供了一种具有多电平单元的闪存器件及其读取和编程方法。 具有多电平单元的闪速存储器件包括存储单元阵列，用于对位线进行预充电的单元，用于向位线提供电压的位线电压供应电路，以及每个都执行与位线不同的功能的第一至第三锁存电路 彼此。 读取和编程方法由LSB和MSB读取和编程操作执行。 通过读取LSB两次并通过读取MSB一次来实现存储器件中的读取方法。 通过编程LSB一次并编程MSB一次来实现编程方法。 具有多级数据的数据可以通过两次编程操作被编程到存储器单元中。