公开(公告)号：US11923025B2

公开(公告)日：2024-03-05

申请号：US17131509

申请日：2020-12-22

Applicant: Kioxia Corporation

Inventor： Avi Steiner ,  Hanan Weingarten ,  Yasuhiko Kurosawa ,  Neil Buxton

IPC: G11C29/42 ,  G11C16/10 ,  G11C16/26 ,  G11C29/44

CPC classification number: G11C29/42 ,  G11C16/10 ,  G11C16/26 ,  G11C29/44

Abstract: Various implementations described herein relate to systems and methods for programming data, including determining a target row corresponding to a program command and setting row-based programming parameters for the target row using target physical device parameters of the target row and optimized programming parameters corresponding to the physical device parameters.

公开(公告)号：US11727998B2

公开(公告)日：2023-08-15

申请号：US17512394

申请日：2021-10-27

Applicant: KIOXIA CORPORATION

Inventor： Shigehiro Asano ,  Neil Buxton ,  Julien Margetts ,  Shunichi Igahara ,  Takehiko Amaki

IPC: G11C16/26 ,  G11C16/34 ,  G11C8/12 ,  G11C16/04

CPC classification number: G11C16/3431 ,  G11C8/12 ,  G11C16/26 ,  G11C16/3495 ,  G11C16/0483

Abstract: A memory system comprises a nonvolatile memory having a plurality of memory cells and a memory controller for controlling the nonvolatile memory. The plurality of memory cells is divided into different groups, and each group is assigned a threshold read count value from a predetermined range of read count values. The memory controller includes a counter which tracks a read count for each group, a determination circuit configured to compare the read count for each group tracked by the counter to the assigned threshold read count value for the group, and a nonvolatile memory read/write circuit configured to read data from the group when the determination circuit indicates the read count for the group has reached the assigned threshold read count value.

公开(公告)号：US20230229326A1

公开(公告)日：2023-07-20

申请号：US17577888

申请日：2022-01-18

Applicant: Kioxia Corporation

Inventor： Neil Buxton ,  Steven Wells

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0659 ,  G06F3/0634 ,  G06F3/0619 ,  G06F3/0679

Abstract: Various implementations described herein relate to systems and methods for managing superblocks, including determining superblocks, including first and second superblocks, in a non-volatile memory storage. The non-volatile memory storage includes independent locations that may be planes or dies. The first superblock includes first blocks corresponding to first independent locations, and the second superblock includes second blocks corresponding to second independent locations. A first number of the first independent locations is less than a number of the independent locations. A second number of the second plurality of independent locations is less than the number of the independent locations.

公开(公告)号：US20220300194A1

公开(公告)日：2022-09-22

申请号：US17203342

申请日：2021-03-16

Applicant: Kioxia Corporation

Inventor： Avadhani Shridhar ,  Neil Buxton ,  Steven Wells ,  Nicole Ross

IPC: G06F3/06

Abstract: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller is configured to issue a command to the non-volatile semiconductor memory device specifying a subset of n buffers of the plurality of buffers in which to transfer a data payload relating to the command.