公开(公告)号：US20230036954A1

公开(公告)日：2023-02-02

申请号：US17385962

申请日：2021-07-27

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ilan Pardo ,  Shahaf Shuler ,  George Elias ,  Nizan Atias ,  Adi Maymon

IPC: G06F12/14 ,  G06F12/02 ,  G06F9/30

Abstract: An apparatus includes a processor, configured to designate a memory region in a memory, and to issue (i) memory-access commands for accessing the memory and (ii) a conditional-fence command associated with the designated memory region. Memory-Access Control Circuitry (MACC) is configured, in response to identifying the conditional-fence command, to allow execution of the memory-access commands that access addresses within the designated memory region, and to defer the execution of the memory-access commands that access addresses outside the designated memory region, until completion of all the memory-access commands that were issued before the conditional-fence command.

公开(公告)号：US20220006606A1

公开(公告)日：2022-01-06

申请号：US17335122

申请日：2021-06-01

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Ariel Shahar ,  Shahaf Shuler ,  Ariel Almog ,  Eitan Hirshberg ,  Natan Manevich

IPC: H04L7/00

Abstract: A timing system including timing circuitry which includes an arming queue, a clock work queue, and a clock completion queue. At least the clock work queue is to provide timing information, and the arming queue is to arm the clock work queue. Related apparatus and methods are also provided.

公开(公告)号：US20250080315A1

公开(公告)日：2025-03-06

申请号：US18950255

申请日：2024-11-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Ariel Shahar ,  Shahaf Shuler ,  Ariel Almog ,  Eitan Hirshberg ,  Natan Manevich

IPC: H04L7/00

Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.

公开(公告)号：US20240143528A1

公开(公告)日：2024-05-02

申请号：US17979013

申请日：2022-11-02

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Eliav Bar-Ilan ,  Ran Avraham Koren ,  Liran Liss ,  Oren Duer ,  Shahaf Shuler

IPC: G06F13/28 ,  G06F13/42

CPC classification number: G06F13/28 ,  G06F13/4221 ,  G06F2213/0024

Abstract: A network adapter includes a network interface, a bus interface, a hardware-implemented data-path and a programmable Data-Plane Accelerator (DPA). The network interface is to communicate with a network. The bus interface is to communicate with an external device over a peripheral bus. The hardware-implemented data-path includes a plurality of packet-processing engines to process data units exchanged between the network and the external device. The DPA is to expose on the peripheral bus a User-Defined Peripheral-bus Device (UDPD), to run user-programmable logic that implements the UDPD, and to process transactions issued from the external device to the UDPD by reusing one or more of the packet-processing engines of the data-path.

公开(公告)号：US20240134681A1

公开(公告)日：2024-04-25

申请号：US17971986

申请日：2022-10-23

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Sayantan Sur ,  Shahaf Shuler ,  Doron Haim ,  Netanel Moshe Gonen ,  Stephen Anthony Bernard Jones

IPC: G06F9/48

CPC classification number: G06F9/4825

Abstract: Techniques described herein include managing scheduling of interrupts by receiving a data packet comprising an indication of an interrupt to be delivered, determining an availability status of a processing thread, and managing an interrupt status indicator in response to determining the availability status. A value of the interrupt status indicator corresponds to a quantity of pending interrupts. An event handling circuit processes the interrupt or one or more pending interrupts using the processing thread.

公开(公告)号：US11941722B2

公开(公告)日：2024-03-26

申请号：US17450743

申请日：2021-10-13

Applicant: Mellanox Technologies, Ltd

Inventor： Sayantan Sur ,  Stephen Anthony Bernard Jones ,  Shahaf Shuler

IPC: G06T1/20 ,  G06F9/54

CPC classification number: G06T1/20 ,  G06F9/545

Abstract: A kernel comprising at least one dynamically configurable parameter is submitted by a processor. The kernel is to be executed at a later time. Data is received after the kernel has been submitted. The at least one dynamically configurable parameter of the kernel is updated based on the data. The kernel having the at least one updated dynamically configurable parameter is executed after the at least one dynamically configurable parameter has been updated.

公开(公告)号：US20240095205A1

公开(公告)日：2024-03-21

申请号：US17987904

申请日：2022-11-16

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Liran Liss ,  Aviad Shaul Yehezkel ,  Rabia Loulou ,  Oren Duer ,  Shahaf Shuler ,  Chenghuan Jia ,  Philip Browning Johnson ,  Gal Shalom ,  Omri Kahalon ,  Adi Merav Horowitz ,  Arpit Jain ,  Eliav Bar-Ilan ,  Prateek Srivastava

IPC: G06F13/42 ,  G06F13/40

CPC classification number: G06F13/4221 ,  G06F13/4022 ,  G06F13/404

Abstract: A system includes a bus interface and circuitry. The bus interface is configured to communicate with an external device over a peripheral bus. The circuitry is configured to support a plurality of widgets that perform primitive operations used in implementing peripheral-bus devices, to receive a user-defined configuration, which specifies a user-defined peripheral-bus device as a configuration of one or more of the widgets, and to implement the user-defined peripheral-bus device toward the external device over the peripheral bus, in accordance with the user-defined configuration.

公开(公告)号：US20230112420A1

公开(公告)日：2023-04-13

申请号：US17450743

申请日：2021-10-13

Applicant: Mellanox Technologies, Ltd

Inventor： Sayantan Sur ,  Stephen Anthony Bernard Jones ,  Shahaf Shuler

IPC: G06T1/20 ,  G06F9/54

Abstract: A kernel comprising at least one dynamically configurable parameter is submitted by a processor. The kernel is to be executed at a later time. Data is received after the kernel has been submitted. The at least one dynamically configurable parameter of the kernel is updated based on the data. The kernel having the at least one updated dynamically configurable parameter is executed after the at least one dynamically configurable parameter has been updated.

公开(公告)号：US20170255590A1

公开(公告)日：2017-09-07

申请号：US15444345

申请日：2017-02-28

Applicant: Mellanox Technologies, Ltd.

Inventor： Shahaf Shuler ,  Noam Bloch ,  Gil Bloch

IPC: G06F15/173 ,  H04L29/08

CPC classification number: G06F15/17331 ,  G06F9/526 ,  H04L67/1097

Abstract: In a fabric of network elements one network element has an object pool to be accessed stored in its memory. A request for atomic access to the object pool by another network element is carried out by transmitting the request through the fabric to the one network element, performing a remote direct memory access to a designated member of the object pool, atomically executing the request, and returning a result of the execution of the request through the fabric to the other network element.

公开(公告)号：US20160072906A1

公开(公告)日：2016-03-10

申请号：US14834443

申请日：2015-08-25

Applicant: Mellanox Technologies Ltd.

Inventor： Shahaf Shuler ,  Noam Bloch ,  Ofer Hayut ,  Richard Graham ,  Ariel Shahar

IPC: H04L29/08 ,  H04L29/06

CPC classification number: H04L67/26 ,  H04L49/9068 ,  H04L67/10 ,  H04L67/1093 ,  H04L67/1097 ,  H04L69/06

Abstract: A method for communication includes posting, by a software process, a set of buffers in a memory of a host processor and creating in the memory a list of labels associated respectively with the buffers. The software process pushes a first part of the list to a network interface controller (NIC), while retaining a second part of the list in the memory under control of the software process. Upon receiving a message containing a label, sent over a network, the NIC compares the label to the labels in the first part of the list and, upon finding a match to the label, writes data conveyed by the message to a buffer in the memory. Upon a failure to find the match in the first part of the list, the NIC passes the message from the NIC to the software process for handling using the second part of the list.

Abstract translation: 一种用于通信的方法包括通过软件处理将主机处理器的存储器中的一组缓冲器发布，并在存储器中创建分别与缓冲器相关联的标签的列表。 软件进程将列表的第一部分推送到网络接口控制器（NIC），同时在软件进程控制下将列表的第二部分保留在内存中。 在接收到包含通过网络发送的标签的消息时，NIC将标签与列表的第一部分中的标签进行比较，并且在找到与标签的匹配时，将消息传送的数据写入存储器中的缓冲器 。 如果在列表的第一部分找不到匹配项，则NIC将该消息从NIC传递到软件进程以使用列表的第二部分进行处理。