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    III-V/II-VI Semiconductor interface fabrication method
    22.
    发明授权
    III-V/II-VI Semiconductor interface fabrication method 失效
    III-V / II-VI半导体接口制造方法

    公开(公告)号：US5879962A

    公开(公告)日：1999-03-09

    申请号：US571607

    申请日：1995-12-13

    申请人： James M. DePuydt ,  Michael A. Haase ,  Kwok-Keung Law ,  Thomas J. Miller ,  James M. Gaines ,  Supratik Guha ,  Bor-Jen Wu

    发明人： James M. DePuydt ,  Michael A. Haase ,  Kwok-Keung Law ,  Thomas J. Miller ,  James M. Gaines ,  Supratik Guha ,  Bor-Jen Wu

    IPC分类号： H01L21/363 ,  H01L21/443 ,  H01L33/00 ,  H01S5/00 ,  H01S5/347 ,  H01L21/00

    CPC分类号： H01L33/0087 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02477 ,  H01L21/02502 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02631 ,  H01L21/02661 ,  H01L21/443

    摘要： A method for repeatably fabricating GaAs/ZnSe and other III-V/II-VI semiconductor interfaces with relatively low stacking fault densities in II-VI semiconductor devices such as laser diodes. The method includes providing a molecular beam epitaxy (MBE) system including at least a group III element source, a group II element source, a group V element source and a group VI element source. A semiconductor substrate having a III-V semiconductor surface on which the interface is to be fabricated is positioned within the MBE system. The substrate is then heated to a temperature suitable for III-V semiconductor growth, and a crystalline III-V semiconductor buffer layer grown on the III-V surface of the substrate. The temperature of the semiconductor substrate is then adjusted to a temperature suitable for II-VI semiconductor growth, and a crystalline II-VI semiconductor buffer layer grown on the III-V buffer layer by alternating beam epitaxy. The group II and group VI sources are operated to expose the III-V buffer layer to a group II element flux before exposing the III-V buffer layer to a group VI element flux.

    摘要翻译： 一种用于在II-VI半导体器件（例如激光二极管）中重复制造GaAs / ZnSe和其他具有相对较低堆垛层错密度的III-V / II-VI半导体界面的方法。 该方法包括提供包括至少III族元素源，II族元素源，V族元素源和VI族元素源的分子束外延（MBE）系统。 具有要在其上制造界面的III-V半导体表面的半导体衬底位于MBE系统内。 然后将衬底加热到​​适于III-V半导体生长的温度，以及在衬底的III-V表面上生长的晶体III-V半导体缓冲层。 然后将半导体衬底的温度调节到适合于II-VI半导体生长的温度，以及通过交替射束外延在III-V缓冲层上生长的晶体II-VI半导体缓冲层。 在将III-V缓冲层暴露于VI族元素通量之前，组II和VI族源被操作以将III-V缓冲层暴露于II族元素通量。

    Semiconductor devices grown on indium-containing substrates utilizing indium depletion mechanisms
    24.
    发明授权
    Semiconductor devices grown on indium-containing substrates utilizing indium depletion mechanisms 有权
    利用铟耗尽机制在含铟衬底上生长的半导体器件

    公开(公告)号：US08994071B2

    公开(公告)日：2015-03-31

    申请号：US13264509

    申请日：2010-04-30

    申请人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    发明人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    IPC分类号： H01L29/22 ,  H01L33/28 ,  H01L33/00 ,  H01L21/02 ,  H01L33/08 ,  H01L33/50

    CPC分类号： H01L33/0087 ,  H01L21/02392 ,  H01L21/02463 ,  H01L21/02466 ,  H01L21/02469 ,  H01L21/0256 ,  H01L21/02568 ,  H01L21/02576 ,  H01L21/02631 ,  H01L33/08 ,  H01L33/28 ,  H01L33/502

    摘要： We have observed anomalous behavior of II-VI semiconductor devices grown on certain semiconductor substrates, and have determined that the anomalous behavior is likely the result of indium atoms from the substrate migrating into the II-V layers during growth. The indium can thus become an unintended dopant in one or more of the II-VI layers grown on the substrate, particularly layers that are close to the growth substrate, and can detrimentally impact device performance. We describe a variety of semiconductor constructions and techniques effective to deplete the migrating indium within a short distance in the growth layers, or to substantially prevent indium from migrating out of the substrate, or to otherwise substantially isolate functional II-VI layers from the migrating indium, so as to maintain good device performance.

    摘要翻译： 我们已经观察到在某些半导体衬底上生长的II-VI半导体器件的异常行为，并且已经确定异常行为可能是在生长期间从衬底中的铟原子迁移到II-V层的结果。 因此，铟可以成为在衬底上生长的一个或多个II-VI层中的非预期掺杂剂，特别是靠近生长衬底的层，并且可能不利地影响器件性能。 我们描述了在生长层中短时间内有效去除迁移铟的各种半导体结构和技术，或者基本上防止铟从衬底迁移出来，或以其他方式实质上将功能性II-VI层与迁移铟 ，以保持良好的设备性能。

    Cadmium-free Re-Emitting Semiconductor Construction
    26.
    发明申请
    Cadmium-free Re-Emitting Semiconductor Construction 失效
    无镉重发半导体结构

    公开(公告)号：US20120097921A1

    公开(公告)日：2012-04-26

    申请号：US13379858

    申请日：2010-06-25

    申请人： Terry L. Smith ,  Michael A. Haase ,  Thomas J. Miller ,  Xiaoguang Sun

    发明人： Terry L. Smith ,  Michael A. Haase ,  Thomas J. Miller ,  Xiaoguang Sun

    IPC分类号： H01L33/04

    CPC分类号： H01L33/08 ,  H01L33/26 ,  H01L33/502

    摘要： Disclosed re-emitting semiconductor constructions (RSCs) may provide full-color RGB or white-light emitting devices that are free of cadmium. Some embodiments may include a potential well that comprises a III-V semiconductor and that converts light of a first photon energy to light of a smaller photon energy, and a window that comprises a II-VI semiconductor having a band gap energy greater than the first photon energy. Some embodiments may include a potential well that converts light having a first photon energy to light having a smaller photon energy and that comprises a II-VI semiconductor that is substantially Cd-free. Some embodiments may include a potential well that comprises a first III-V semiconductor and that converts light having a first photon energy to light having a smaller photon energy, and a window that comprises a second III-V semiconductor and that has a band gap energy greater than the first photon energy.

    摘要翻译： 公开的再发射半导体结构（RSC）可以提供不含镉的全色RGB或白光发射器件。 一些实施例可以包括包含III-V半导体并且将第一光子能量的光转换成较小光子能量的光的势阱，以及包括具有大于第一光子能级的带隙能量的II-VI半导体的窗口 光子能量。 一些实施例可以包括将具有第一光子能量的光转换成具有较小光子能量的光并且包括基本上不含Cd的II-VI半导体的势阱。 一些实施例可以包括包括第一III-V半导体并且将具有第一光子能量的光转换成具有较小光子能量的光的势阱，以及包括第二III-V半导体并且具有带隙能量 大于第一光子能量。

    Polychromatic LED's and related semiconductor devices
    27.
    发明授权
    Polychromatic LED's and related semiconductor devices 有权
    多色LED及相关半导体器件

    公开(公告)号：US08148741B2

    公开(公告)日：2012-04-03

    申请号：US12781227

    申请日：2010-05-17

    申请人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    发明人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    IPC分类号： H01L33/00

    CPC分类号： H01L33/28 ,  B82Y20/00 ,  H01L33/0008 ,  H01L33/06

    摘要： A semiconductor device is provided comprising a first potential well located within a pn junction and a second potential well not located within a pn junction. The potential wells may be quantum wells. The semiconductor device is typically an LED, and may be a white or near-white light LED. The semiconductor device may additionally comprise a third potential well not located within a pn junction. The semiconductor device may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the second or third quantum wells. In addition, graphic display devices and illumination devices comprising the semiconductor device according to the present invention are provided.

    摘要翻译： 提供了一种半导体器件，其包括位于pn结内的第一势阱和不位于pn结内的第二势阱。 势阱可能是量子阱。 半导体器件通常是LED，并且可以是白色或近白色的光LED。 半导体器件还可以包括不位于pn结内的第三势阱。 半导体器件还可以包括围绕或紧密或紧邻第二或第三量子阱的吸收层。 此外，提供了包括根据本发明的半导体器件的图形显示装置和照明装置。

    Polychromatic LED's and Related Semiconductor Devices
    29.
    发明申请
    Polychromatic LED's and Related Semiconductor Devices 有权
    多色LED和相关半导体器件

    公开(公告)号：US20100224889A1

    公开(公告)日：2010-09-09

    申请号：US12781227

    申请日：2010-05-17

    申请人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    发明人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    IPC分类号： H01L33/08 ,  H01L33/04

    CPC分类号： H01L33/28 ,  B82Y20/00 ,  H01L33/0008 ,  H01L33/06

    摘要： A semiconductor device is provided comprising a first potential well located within a pn junction and a second potential well not located within a pn junction. The potential wells may be quantum wells. The semiconductor device is typically an LED, and may be a white or near-white light LED. The semiconductor device may additionally comprise a third potential well not located within a pn junction. The semiconductor device may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the second or third quantum wells. In addition, graphic display devices and illumination devices comprising the semiconductor device according to the present invention are provided.

    摘要翻译： 提供了一种半导体器件，其包括位于pn结内的第一势阱和不位于pn结内的第二势阱。 势阱可能是量子阱。 半导体器件通常是LED，并且可以是白色或近白色的LED。 半导体器件还可以包括不位于pn结内的第三势阱。 半导体器件还可以包括围绕或紧密或紧邻第二或第三量子阱的吸收层。 此外，提供了包括根据本发明的半导体器件的图形显示装置和照明装置。

    Polychromatic LED's and related semiconductor devices
    30.
    发明授权
    Polychromatic LED's and related semiconductor devices 无效
    多色LED及相关半导体器件

    公开(公告)号：US07745814B2

    公开(公告)日：2010-06-29

    申请号：US11009241

    申请日：2004-12-09

    申请人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    发明人： Thomas J. Miller ,  Michael A. Haase ,  Xiaoguang Sun

    IPC分类号： H01L29/06 ,  H01L27/15

    CPC分类号： H01L33/28 ,  B82Y20/00 ,  H01L33/0008 ,  H01L33/06

    摘要： A semiconductor device is provided comprising a first potential well located within a pn junction and a second potential well not located within a pn junction. The potential wells may be quantum wells. The semiconductor device is typically an LED, and may be a white or near-white light LED. The semiconductor device may additionally comprise a third potential well not located within a pn junction. The semiconductor device may additionally comprise absorbing layers surrounding or closely or immediately adjacent to the second or third quantum wells. In addition, graphic display devices and illumination devices comprising the semiconductor device according to the present invention are provided.

    摘要翻译： 提供了一种半导体器件，其包括位于pn结内的第一势阱和不位于pn结内的第二势阱。 势阱可能是量子阱。 半导体器件通常是LED，并且可以是白色或近白色的LED。 半导体器件还可以包括不位于pn结内的第三势阱。 半导体器件还可以包括围绕或紧密或紧邻第二或第三量子阱的吸收层。 此外，提供了包括根据本发明的半导体器件的图形显示装置和照明装置。