公开(公告)号：US10395697B1

公开(公告)日：2019-08-27

申请号：US15892118

申请日：2018-02-08

Applicant: Micron Technology, Inc.

Inventor： Mahdi Jamali ,  William A. Melton ,  Daniele Vimercati ,  Xinwei Guo ,  Yasuko Hattori

IPC: G11C7/06

Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.

公开(公告)号：US10170173B2

公开(公告)日：2019-01-01

申请号：US15847583

申请日：2017-12-19

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Daniele Vimercati

IPC: G11C11/22

Abstract: Methods, systems, and devices for a sensing scheme that extracts the full or nearly full remnant polarization charge difference between two logic states of a ferroelectric memory cell or cells is described. The scheme employs a charge mirror to extract the full charge difference between the two states of a selected memory cell. The charge mirror may transfer the memory cell polarization charge to an amplification capacitor. The signal on the amplification capacitor may then be compared with a reference voltage to detect the logic state of the memory cell.

公开(公告)号：US20180114559A1

公开(公告)日：2018-04-26

申请号：US15847583

申请日：2017-12-19

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Daniele Vimercati

IPC: G11C11/22

CPC classification number: G11C11/2273 ,  G11C11/221 ,  G11C11/2275

Abstract: Methods, systems, and devices for a sensing scheme that extracts the full or nearly full remnant polarization charge difference between two logic states of a ferroelectric memory cell or cells is described. The scheme employs a charge mirror to extract the full charge difference between the two states of a selected memory cell. The charge mirror may transfer the memory cell polarization charge to an amplification capacitor. The signal on the amplification capacitor may then be compared with a reference voltage to detect the logic state of the memory cell.

公开(公告)号：US09659602B2

公开(公告)日：2017-05-23

申请号：US14241257

申请日：2013-04-18

Applicant: Micron Technology, Inc.

Inventor： Liang Qiao ,  Xinwei Guo

IPC: G11C5/14 ,  H02M3/07 ,  H02M1/00

CPC classification number: G11C5/147 ,  H02M3/07 ,  H02M2001/0025

Abstract: Voltage control in integrated circuits include a first voltage divider coupled to receive a reference voltage and having an output providing an adjusted reference voltage; an operational amplifier having a first input coupled to receive the output of the first voltage divider, a second input coupled to receive a feedback voltage, and an output; a voltage generation circuit responsive to the output of the operational amplifier and having an output providing an output voltage; and a second voltage divider coupled to receive the output voltage and having an output providing the feedback voltage. The first voltage divider is responsive to first control signals to adjust a voltage level of the adjusted reference voltage. The second voltage divider is responsive to second control signals to adjust a voltage level of the feedback voltage.

公开(公告)号：US09627051B2

公开(公告)日：2017-04-18

申请号：US14715126

申请日：2015-05-18

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Richard E Fackenthal

IPC: G11C13/00 ,  G11C5/14 ,  G11C11/56 ,  G11C16/26 ,  G11C29/02

CPC classification number: G11C13/0021 ,  G11C5/147 ,  G11C11/5678 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/004 ,  G11C16/26 ,  G11C29/021 ,  G11C29/028 ,  G11C2013/0054 ,  G11C2211/5634 ,  G11C2211/5645

Abstract: Some embodiments include apparatuses and methods having a first memory element and a first select component coupled to the first memory element, a second memory element and a second select component coupled to the second memory element, and an access line shared by the first and second select components. At least one of the embodiments can include a circuit to generate a signal indicating a state of the second memory element based on a first signal developed from a first signal path through the first memory element and a second signal developed from a second signal path through the second memory element.

公开(公告)号：US20150255154A1

公开(公告)日：2015-09-10

申请号：US14715126

申请日：2015-05-18

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Richard E. Fackenthal

IPC: G11C13/00

CPC classification number: G11C13/0021 ,  G11C5/147 ,  G11C11/5678 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/004 ,  G11C16/26 ,  G11C29/021 ,  G11C29/028 ,  G11C2013/0054 ,  G11C2211/5634 ,  G11C2211/5645

Abstract: Some embodiments include apparatuses and methods having a first memory element and a first select component coupled to the first memory element, a second memory element and a second select component coupled to the second memory element, and an access line shared by the first and second select components. At least one of the embodiments can include a circuit to generate a signal indicating a state of the second memory element based on a first signal developed from a first signal path through the first memory element and a second signal developed from a second signal path through the second memory element.

Abstract translation: 一些实施例包括具有第一存储器元件和耦合到第一存储器元件的第一选择元件，耦合到第二存储器元件的第二存储元件和第二选择元件的装置和方法，以及由第一和第二选择 组件。 实施例中的至少一个可以包括基于从通过第一存储器元件的第一信号路径产生的第一信号产生指示第二存储器元件的状态的信号的电路以及从第二信号路径产生的第二信号 第二存储元件。

公开(公告)号：US20220189514A1

公开(公告)日：2022-06-16

申请号：US17557825

申请日：2021-12-21

Applicant: Micron Technology, Inc.

Inventor： Daniele Vimercati ,  Xinwei Guo

IPC: G11C7/06 ,  H03F3/45 ,  G11C11/16 ,  G11C11/15

Abstract: Methods, systems, and devices for differential amplifier schemes for sensing memory cells are described. In one example, an apparatus may include a memory cell, a differential amplifier having a first input node, a second input node, and an output node that is coupled with the first input node via a first capacitor, and a second capacitor coupled with the first input node. The apparatus may include a controller configured to cause the apparatus to bias the first capacitor, couple the memory cell with the first input node, and generate, at the output node, a sense signal based at least in part on biasing the first capacitor and coupling the memory cell with the first input node. The apparatus may also include a sense component configured to determine a logic state stored by the memory tell based at least in part on the sense signal.

公开(公告)号：US20220005518A1

公开(公告)日：2022-01-06

申请号：US17470655

申请日：2021-09-09

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Daniele Vimercati

IPC: G11C11/22

Abstract: Methods, systems, and devices for a sensing scheme that extracts the full or nearly full remnant polarization charge difference between two logic states of a ferroelectric memory cell or cells is described. The scheme employs a charge mirror to extract the full charge difference between the two states of a selected memory cell. The charge mirror may transfer the memory cell polarization charge to an amplification capacitor. The signal on the amplification capacitor may then be compared with a reference voltage to detect the logic state of the memory cell.

公开(公告)号：US11133048B2

公开(公告)日：2021-09-28

申请号：US16504876

申请日：2019-07-08

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Daniele Vimercati

IPC: G11C11/22

Abstract: Methods, systems, and devices for a sensing scheme that extracts the full or nearly full remnant polarization charge difference between two logic states of a ferroelectric memory cell or cells is described. The scheme employs a charge mirror to extract the full charge difference between the two states of a selected memory cell. The charge mirror may transfer the memory cell polarization charge to an amplification capacitor. The signal on the amplification capacitor may then be compared with a reference voltage to detect the logic state of the memory cell.

公开(公告)号：US20210110863A1

公开(公告)日：2021-04-15

申请号：US17078806

申请日：2020-10-23

Applicant: Micron Technology, Inc.

Inventor： Xinwei Guo ,  Daniele Vimercati

IPC: G11C11/4091 ,  G11C7/08 ,  G11C11/22 ,  G11C16/26 ,  G11C16/08 ,  G11C7/06

Abstract: Methods and apparatus for sensing a memory cell using lower offset, higher speed sense amplifiers are described. A sense amplifier may include an amplifier component that is configurable to operate in an amplifier mode or a latch mode. In some examples, the amplifier component may be configured to operate in the amplifier or latch mode by activating or deactivating switching components inside the amplifier component. When configured to operate in the amplifier mode, the amplifier component may be used, during a read operation of a memory cell, to pre-charge a digit line and/or amplify a signal received from the memory cell. When configured to operate in the latch mode, the amplifier component may be used to latch a state of the memory cell. In some cases, the amplifier component may use some of the same internal circuitry for pre-charging the digit line, amplifying the signal, and/or latching the state.