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公开(公告)号：US11705194B2
公开(公告)日：2023-07-18
申请号：US17733683
申请日：2022-04-29
Applicant: Micron Technology, Inc.
Inventor： Federico Pio
IPC: G11C13/00
CPC classification number: G11C13/003 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C13/0069 , G11C2013/0045
Abstract: Techniques are provided for accessing two memory cells of a memory tile concurrently. A memory tile may include a plurality of self-selecting memory cells addressable using a row decoder and a column decoder. A memory controller may access a first self-selecting memory cell of the memory tile using a first pulse having a first polarity to the first self-selecting memory cell. The memory controller may also access a second self-selecting memory cell of the memory tile concurrently with accessing the first self-selecting memory cell using a second pulse having a second polarity different than the first polarity. The memory controller may determine characteristics of the pulses to mitigate disturbances of unselected self-selecting memory cells of the memory tile.
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公开(公告)号：US20220336013A1
公开(公告)日：2022-10-20
申请号：US17733683
申请日：2022-04-29
Applicant: Micron Technology, Inc.
Inventor： Federico Pio
IPC: G11C13/00
Abstract: Techniques are provided for accessing two memory cells of a memory tile concurrently. A memory tile may include a plurality of self-selecting memory cells addressable using a row decoder and a column decoder. A memory controller may access a first self-selecting memory cell of the memory tile using a first pulse having a first polarity to the first self-selecting memory cell. The memory controller may also access a second self-selecting memory cell of the memory tile concurrently with accessing the first self-selecting memory cell using a second pulse having a second polarity different than the first polarity. The memory controller may determine characteristics of the pulses to mitigate disturbances of unselected self-selecting memory cells of the memory tile.
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公开(公告)号：US11282574B2
公开(公告)日：2022-03-22
申请号：US17062127
申请日：2020-10-02
Applicant: Micron Technology, Inc.
Inventor： Graziano Mirichigni , Paolo Amato , Federico Pio , Alessandro Orlando , Marco Sforzin
Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.
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公开(公告)号：US20210257225A1
公开(公告)日：2021-08-19
申请号：US17307273
申请日：2021-05-04
Applicant: Micron Technology, Inc.
Inventor： Federico Pio
Abstract: Semiconductor device packages and associated methods are disclosed herein. In some embodiments, the semiconductor device package includes (1) a first surface and a second surface opposite the first surface; (2) a semiconductor die positioned between the first and second surfaces; and (3) a pattern positioned in a designated area of the first surface. The pattern includes multiple bit areas. Each of the bit areas represents a first bit information or a second bit information. the pattern presents information for operating the semiconductor die. The pattern is configured to be read by a pattern scanner.
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公开(公告)号：US20210057233A1
公开(公告)日：2021-02-25
申请号：US16548126
申请日：2019-08-22
Applicant: Micron Technology, Inc.
Inventor： Federico Pio
Abstract: Semiconductor device packages and associated methods are disclosed herein. In some embodiments, the semiconductor device package includes (1) a first surface and a second surface opposite the first surface; (2) a semiconductor die positioned between the first and second surfaces; and (3) a pattern positioned in a designated area of the first surface. The pattern includes multiple bit areas. Each of the bit areas represents a first bit information or a second bit information. the pattern presents information for operating the semiconductor die. The pattern is configured to be read by a pattern scanner.
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Patent Agency Ranking
公开(公告)号：US10896727B2
公开(公告)日：2021-01-19
申请号：US16791764
申请日：2020-02-14
Applicant: Micron Technology Inc.
Inventor： Graziano Mirichigni , Paolo Amato , Federico Pio , Alessandro Orlando , Marco Sforzin
Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.
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公开(公告)号：US10431301B2
公开(公告)日：2019-10-01
申请号：US15853364
申请日：2017-12-22
Applicant: Micron Technology, Inc.
Inventor： Graziano Mirichigni , Paolo Amato , Federico Pio , Alessandro Orlando , Marco Sforzin
Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.
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28.发明申请METHOD OF USING MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY 有权使用存储器指令（包括参数）影响存储器的操作条件的方法公开(公告)号：US20130167251A1
公开(公告)日：2013-06-27
申请号：US13770881
申请日：2013-02-19
Applicant: Micron Technology, Inc.
Inventor： Federico Pio
CPC classification number: G11C5/147 , G06F12/0246 , G06F21/60 , G06F2212/7204 , G11C7/1078 , G11C7/109 , G11C7/22 , G11C11/5621 , G11C11/5671 , G11C14/0063 , G11C14/009 , G11C16/0408 , G11C16/06 , G11C16/107 , G11C16/12 , G11C16/26 , G11C16/30
Abstract: Subject matter disclosed herein relates to techniques to use a memory device. A method includes receiving a memory instruction comprising at least one parameter representative of at least one threshold voltage value and a read command to read at least one cell of the memory device. The method further includes detecting at least one voltage value from the at least one cell. The method further includes comparing the at least one voltage value to the at least one threshold voltage value. The method further includes determining at least one logical value of the at least one cell in response to the comparison of the at least one voltage value to the at least one threshold voltage value.
Abstract translation: 本文公开的主题涉及使用存储器件的技术。 一种方法包括接收包含至少一个表示至少一个阈值电压值的参数和读取命令的存储器指令以读取存储器件的至少一个单元。 该方法还包括从至少一个小区检测至少一个电压值。 该方法还包括将至少一个电压值与至少一个阈值电压值进行比较。 所述方法还包括响应于所述至少一个电压值与所述至少一个阈值电压值的比较来确定所述至少一个单元的至少一个逻辑值。
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公开(公告)号：US20250054776A1
公开(公告)日：2025-02-13
申请号：US18928521
申请日：2024-10-28
Applicant: Micron Technology, Inc.
Inventor： Federico Pio
Abstract: Semiconductor device packages and associated methods are disclosed herein. In some embodiments, the semiconductor device package includes (1) a first surface and a second surface opposite the first surface; (2) a semiconductor die positioned between the first and second surfaces; and (3) a pattern positioned in a designated area of the first surface. The pattern includes multiple bit areas. Each of the bit areas represents a first bit information or a second bit information. the pattern presents information for operating the semiconductor die. The pattern is configured to be read by a pattern scanner.
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公开(公告)号：US20240386956A1
公开(公告)日：2024-11-21
申请号：US18661300
申请日：2024-05-10
Applicant: Micron Technology, Inc.
Inventor： Graziano Mirichigni , Paolo Amato , Federico Pio , Alessandro Orlando , Marco Sforzin
Abstract: Methods, systems, and devices related to auto-referenced memory cell read techniques are described. The auto-referenced read may encode user data to include a predetermined number of bits having a first logic state prior to storing the user data in memory cells. The auto-referenced read may store a total number of bits of the user data having a first logic state in a separate set of memory cells. Subsequently, reading the user data may be carried out by applying a read voltage to the memory cells storing the user data while monitoring a series of switching events by activating a subset of the memory cells having the first logic state. During the read operation, the auto-referenced read may compare the number of activated memory cells to either the predetermined number or the total number to determine whether all the bits having the first logic state has been detected. When the number of activated memory cells matches either the predetermined number or the total number, the auto-referenced read may determine that the memory cells that have been activated correspond to the first logic state.
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