公开(公告)号：US09330026B2

公开(公告)日：2016-05-03

申请号：US13785979

申请日：2013-03-05

Applicant: QUALCOMM Incorporated

Inventor： Thomas Zeng ,  Azzedine Touzni ,  Tzung Ren Tzeng ,  Phil J. Bostley

IPC: G06F12/14 ,  G06F12/1027 ,  G06F21/79 ,  G06F12/10

CPC classification number: G06F12/145 ,  G06F9/45504 ,  G06F12/1027 ,  G06F12/1491 ,  G06F21/79 ,  G06F2212/1032 ,  G06F2212/151 ,  G06F2212/152 ,  G06F2212/654 ,  G06F2212/68

Abstract: A security apparatus and method are provided for performing a security algorithm that prevents unauthorized access to contents of a physical address (PA) that have been loaded into a storage element of the computer system as a result of performing a prediction algorithm during a hardware table walk that uses a predictor to predict a PA based on a virtual address (VA). When the predictor is enabled, it might be possible for a person with knowledge of the system to configure the predictor to cause contents stored at a PA of a secure portion of the main memory to be loaded into a register in the TLB. In this way, a person who should not have access to contents stored in secure portions of the main memory could indirectly gain unauthorized access to those contents. The apparatus and method prevent such unauthorized access to the contents by masking the contents under certain conditions.

Abstract translation: 提供了一种安全装置和方法，用于执行安全算法，该安全算法防止在硬件表步行期间执行预测算法的结果，防止对已经加载到计算机系统的存储元件中的物理地址（PA）的内容的未经授权的访问 其使用预测器来基于虚拟地址（VA）预测PA。 当启用预测器时，具有系统知识的人可能配置预测器以使存储在主存储器的安全部分的PA的内容被加载到TLB中的寄存器中。 以这种方式，不能访问存储在主存储器的安全部分中的内容的人可以间接地获得对这些内容的未经授权的访问。 该装置和方法通过在某些条件下屏蔽内容来防止对该内容的未经授权的访问。

公开(公告)号：US20140258663A1

公开(公告)日：2014-09-11

申请号：US13785979

申请日：2013-03-05

Applicant: QUALCOMM INCORPORATED

Inventor： Thomas Zeng ,  Azzedine Touzni ,  Tzung Ren Tzeng ,  Phil J. Bostley

IPC: G06F12/14

CPC classification number: G06F12/145 ,  G06F9/45504 ,  G06F12/1027 ,  G06F12/1491 ,  G06F21/79 ,  G06F2212/1032 ,  G06F2212/151 ,  G06F2212/152 ,  G06F2212/654 ,  G06F2212/68

Abstract: A security apparatus and method are provided for performing a security algorithm that prevents unauthorized access to contents of a physical address (PA) that have been loaded into a storage element of the computer system as a result of performing a prediction algorithm during a hardware table walk that uses a predictor to predict a PA based on a virtual address (VA). When the predictor is enabled, it might be possible for a person with knowledge of the system to configure the predictor to cause contents stored at a PA of a secure portion of the main memory to be loaded into a register in the TLB. In this way, a person who should not have access to contents stored in secure portions of the main memory could indirectly gain unauthorized access to those contents. The apparatus and method prevent such unauthorized access to the contents by masking the contents under certain conditions.

Abstract translation: 提供一种安全装置和方法，用于执行安全算法，以防止在硬件表步行期间执行预测算法的结果，防止对已经加载到计算机系统的存储元件中的物理地址（PA）的内容的未经授权的访问 其使用预测器来基于虚拟地址（VA）预测PA。 当启用预测器时，具有系统知识的人可能配置预测器以使存储在主存储器的安全部分的PA的内容被加载到TLB中的寄存器中。 以这种方式，不能访问存储在主存储器的安全部分中的内容的人可以间接地获得对这些内容的未经授权的访问。 该装置和方法通过在某些条件下屏蔽内容来防止对该内容的未经授权的访问。

公开(公告)号：US20140258586A1

公开(公告)日：2014-09-11

申请号：US13785877

申请日：2013-03-05

Applicant: QUALCOMM INCORPORATED

Inventor： Thomas Zeng ,  Azzedine Touzni ,  Tzung Ren Tzeng ,  Phil J. Bostley

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F9/45533 ,  G06F9/45545 ,  G06F9/45558 ,  G06F12/10 ,  G06F2212/151 ,  G06F2212/171 ,  G06F2212/507 ,  G06F2212/654 ,  G06F2212/684

Abstract: A computer system and a method are provided that reduce the amount of time and computing resources that are required to perform a hardware table walk (HWTW) in the event that a translation lookaside buffer (TLB) miss occurs. If a TLB miss occurs when performing a stage 2 (S2) HWTW to find the PA at which a stage 1 (S1) page table is stored, the MMU uses the IPA to predict the corresponding PA, thereby avoiding the need to perform any of the S2 table lookups. This greatly reduces the number of lookups that need to be performed when performing these types of HWTW read transactions, which greatly reduces processing overhead and performance penalties associated with performing these types of transactions.

Abstract translation: 提供一种计算机系统和方法，其在发生翻译后备缓冲器（TLB）未命中的情况下减少执行硬件表行走（HWTW）所需的时间量和计算资源。 如果执行阶段2（S2）HWTW以找到存储第1（S1）页表的PA时发生TLB未命中，则MMU使用IPA预测相应的PA，从而避免执行任何 S2表查找。 这大大减少了执行这些类型的HWTW读取事务时需要执行的查找次数，这大大降低了与执行这些类型的事务相关联的处理开销和性能损失。

公开(公告)号：US20140164689A1

公开(公告)日：2014-06-12

申请号：US13726537

申请日：2012-12-24

Applicant: QUALCOMM INCORPORATED

Inventor： Dexter T. Chun ,  Serag Gadelrab ,  Stephen Molloy ,  Thomas Zeng

IPC: G06F12/06

CPC classification number: G06F12/0607 ,  G06F13/1647 ,  G06F13/1694

Abstract: Systems and methods are provided for managing performance of a computing device having dissimilar memory types. An exemplary embodiment comprises a method for interleaving dissimilar memory devices. The method involves determining an interleave bandwidth ratio comprising a ratio of bandwidths for two or more dissimilar memory devices. The dissimilar memory devices are interleaved according to the interleave bandwidth ratio. Memory address requests are distributed from one or more processing units to the dissimilar memory devices according to the interleave bandwidth ratio.

Abstract translation: 提供了用于管理具有不同存储器类型的计算设备的性能的系统和方法。 示例性实施例包括用于交错不同存储器件的方法。 该方法涉及确定包括两个或多个不同存储器件的带宽比的交织带宽比。 不同的存储器件根据交织带宽比进行交织。 存储器地址请求根据交织带宽比从一个或多个处理单元分配到不同的存储器设备。