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    BONDING DEFECT DETECTION FOR DIE-TO-DIE BONDING IN MEMORY DEVICES
    22.
    发明公开
    BONDING DEFECT DETECTION FOR DIE-TO-DIE BONDING IN MEMORY DEVICES 审中-公开

    公开(公告)号：US20230410934A1

    公开(公告)日：2023-12-21

    申请号：US18163975

    申请日：2023-02-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junyoung Ko ,  Jungmin Bak ,  Changhwi Park

    IPC: G11C29/50

    CPC classification number: G11C29/50004 ,  G11C2029/5004

    Abstract: A semiconductor device may include: a memory device that includes a memory cell, a page buffer, and a first switch having a first end that is electrically connected to a first node located at a bonding point of the memory cell and a second end that is connected to a second node located at the page buffer; and a memory controller that is configured to apply a pre-charge voltage to the first node and the second node in a first period, to close the first switch in a second period following the first period, and is configured to determine whether bonding between the memory cell and the first switch is defective based on a voltage of the second node after the first switch is closed.

    SEMICONDUCTOR DEVICES
    24.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20210050291A1

    公开(公告)日：2021-02-18

    申请号：US16826995

    申请日：2020-03-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junyoung Ko ,  Senyun Kim ,  Younghoon Ro

    IPC: H01L23/498 ,  H01L23/14 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48

    Abstract: A semiconductor device comprises a substrate, a semiconductor chip on the substrate, and first and second leads between the substrate and the semiconductor chip. The first and second leads extend from an edge of the substrate toward below the semiconductor chip along a first direction parallel to a top surface of the substrate. The first lead includes a first bump connector and a first segment. The second lead includes a second bump connector. The first bump connector is spaced apart in the first direction from the second bump connector. The first segment of the first lead is spaced apart in a second direction from the second bump connector. The second direction is parallel to the top surface of the substrate and perpendicular to the first direction. A thickness of the first segment of the first lead is less than that of the second bump connector.

    Semiconductor memory modules and methods of fabricating the same
    26.
    发明授权
    Semiconductor memory modules and methods of fabricating the same 有权
    半导体存储器模块及其制造方法

    公开(公告)号：US08749044B2

    公开(公告)日：2014-06-10

    申请号：US13831272

    申请日：2013-03-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Young-Ja Kim ,  Junyoung Ko ,  Daesang Chan

    IPC: H01L23/48

    CPC classification number: H01L21/50 ,  H01L23/3157 ,  H01L23/49811 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/838 ,  H01L2224/94 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/11

    Abstract: The inventive concept provides semiconductor memory modules and methods of fabricating the same. The semiconductor memory module may include a module board having a first surface and a second surface opposite to the first surface, and memory chips mounted directly on the module board by a flip-chip bonding method. Each of the memory chips may include a passivation layer disposed on a rear surface of each of the memory chips, and the passivation layer may have a color different from a natural color of single-crystalline silicon.

    Abstract translation: 本发明构思提供了半导体存储器模块及其制造方法。 半导体存储器模块可以包括具有与第一表面相对的第一表面和第二表面的模块板，以及通过倒装芯片焊接方法直接安装在模块板上的存储芯片。 每个存储器芯片可以包括设置在每个存储器芯片的后表面上的钝化层，并且钝化层可以具有与单晶硅的自然颜色不同的颜色。

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