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21.发明公开公开(公告)号：US20230410901A1
公开(公告)日：2023-12-21
申请号：US17752524
申请日：2022-05-24
Applicant: SanDisk Technologies LLC
Inventor： Dong-Il Moon , Abhijith Prakash , Wei Zhao , Henry Chin
CPC classification number: G11C11/5642 , G11C16/26 , G11C11/5671
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells each connected to one of a plurality of word lines. The memory cells are disposed in strings and configured to retain a threshold voltage corresponding to one of a plurality of data states. A control means is coupled to the plurality of word lines and the strings and is configured to apply a read voltage to a selected ones of the plurality of word lines during a read operation and ramp down to a discharge voltage at an end of the read operation and apply a ready voltage to the selected ones of the plurality of word lines during a ready period of time following the read operation. The control means is also configured to adjust at least one of the discharge voltage and the ready voltage based on a temperature of the memory apparatus.
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公开(公告)号：US11848059B2
公开(公告)日：2023-12-19
申请号：US17529722
申请日：2021-11-18
Applicant: SanDisk Technologies LLC
Inventor： Jiacen Guo , Xiang Yang , Abhijith Prakash
CPC classification number: G11C16/3445 , G11C16/0433 , G11C16/08 , G11C16/16 , G11C16/28 , G11C16/3404
Abstract: A method of erasing memory cells in a memory device is provided. The method includes grouping a plurality of word lines into a first group, which does not include edge word lines, and a second group, which does include edge word lines. An erase operation is performed on the memory cells of the first and second groups until erase-verify of the memory cells of the first group passes. It is then determined if further erase of the memory cells of the second group is necessary. In response to it being determined that the additional erase operation is necessary, an additional erase operation is performed on at least some of the memory cells of the second group until erase-verify of the memory cells of the second group passes.
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公开(公告)号：US20230162809A1
公开(公告)日：2023-05-25
申请号：US17533292
申请日：2021-11-23
Applicant: SanDisk Technologies LLC
Inventor： Abhijith Prakash , Xiang Yang , Dengtao Zhao
CPC classification number: G11C16/3459 , G11C16/0483 , G11C16/10 , G11C16/26
Abstract: A plurality of memory programming the memory cells to at least one programmed data state in a plurality of program-verify iterations. In each iteration, after a programming pulse, a sensing operation is conducted to compare the threshold voltages of the memory cells to a low verify voltage associated with a first programmed data state and to a high very voltage associated with the first programmed data state. The sensing operation includes discharging a sense node through a bit line coupled to one of the memory cells and monitoring a discharge time of the sense node. At least one aspect of the sensing operation is temperature dependent so that a voltage gap between the high and low verify voltages is generally constant across a range of temperatures.
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公开(公告)号：US11264110B2
公开(公告)日：2022-03-01
申请号：US16790362
申请日：2020-02-13
Applicant: SanDisk Technologies LLC
Inventor： Abhijith Prakash , Jiahui Yuan
Abstract: Apparatuses and techniques are described for periodically refreshing word line voltages in a block of memory cells based on the susceptibility of the block to read errors. One source of read errors is delayed read disturb which results from a low word line voltage during idle periods of the memory device. In one aspect, periodic refresh operations are optimized based on factors such as a number of bits per cell in the block and number of program-erase (P-E) cycles. For example, at high P-E cycles, the amplitude of a refresh voltage for a single-level cell (SLC) block can be 0 V or lower while the amplitude of a refresh voltage for a multi-level cell (MLC) block can be an intermediate voltage between 0 V and a pass voltage.
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公开(公告)号：US11139030B1
公开(公告)日：2021-10-05
申请号：US16861697
申请日：2020-04-29
Applicant: SanDisk Technologies LLC
Inventor： Abhijith Prakash , Anubhav Khandelwal
Abstract: An apparatus includes a plurality of NAND strings in a block with word lines connected to cells of the NAND strings and select lines connected to select gate transistors of the NAND strings. A plurality of blocks are connected together and selected for operations using a block select signal. A control circuit is configured to, after a read operation of memory cells of the block, hold a block select signal applied to a block select line to select a group of blocks having a same block select line at an on level. The control circuit can further discharge an unselected control gate in the group of blocks from a charged level to a lower level, lower than charged, prior to turning off the block select signal and charge the unselected control gate to a level greater than the lower level after the block select signal transitions from the on level to an off level.
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Patent Agency Ranking
公开(公告)号：US12046305B2
公开(公告)日：2024-07-23
申请号：US17665267
申请日：2022-02-04
Applicant: SanDisk Technologies LLC
Inventor： Xiang Yang , Abhijith Prakash
CPC classification number: G11C16/3459 , G11C16/08 , G11C16/102 , G11C16/14 , G11C16/28 , G11C16/3404
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines including a dummy word line and other data word lines. The memory cells are disposed in memory holes and configured to retain a threshold voltage. A control means is coupled to the word lines and the memory holes and is configured to determine whether one of the word lines being programmed in a program operation is a particular one of the word lines adjacent the dummy word line needing a dummy positioning operation. The control means is also configured to program the memory cells connected to the dummy word line to adjust the threshold voltage to a predetermined position threshold voltage in the dummy positioning operation in response to determining the one of the plurality of word lines being programmed in the program operation is the particular one of the word lines.
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公开(公告)号：US11972808B2
公开(公告)日：2024-04-30
申请号：US17666940
申请日：2022-02-08
Applicant: SanDisk Technologies LLC
Inventor： Abhijith Prakash , Xiang Yang
CPC classification number: G11C16/3427 , G11C16/0483 , G11C16/26 , G11C16/3431 , H10B41/27 , H10B43/27
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines and disposed in memory holes organized in rows grouped in strings and configured to retain a threshold voltage. The memory cells are connected in series between a drain-side select gate transistor on a drain-side of each of the memory holes and a source-side select gate transistor on a source-side of each of the memory holes. A control means determines whether a downshift recovery trigger event has occurred in memory operations. In response to determining the downshift recovery trigger event has occurred, the control means inserts at least one of a predetermined idle time in the memory operations and a recovery pulse of a negative voltage to the drain-side select gate transistor of the memory holes of the strings for a predetermined pulse period of time during one of the memory operations.
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公开(公告)号：US11961572B2
公开(公告)日：2024-04-16
申请号：US17511818
申请日：2021-10-27
Applicant: SanDisk Technologies LLC
Inventor： Xiang Yang , Abhijith Prakash , Shubhajit Mukherjee
CPC classification number: G11C16/3459 , G11C16/0433 , G11C16/08 , G11C16/102 , G11C16/24 , G11C16/26 , G11C16/3404
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines including at least one edge word line and other data word lines. The memory cells are arranged in strings and are configured to retain a threshold voltage corresponding to data states. The strings are organized in rows and a control means is coupled to the word lines and the strings and identifies the at least one edge word line. The control means programs the memory cells of the strings in particular ones of the rows and associated with the at least one edge word line to have an altered distribution of the threshold voltage for one or more of the data states compared to the memory cells of the strings not in particular ones of the rows and not associated with the at least one edge word line during a program operation.
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公开(公告)号：US20240105269A1
公开(公告)日：2024-03-28
申请号：US17954489
申请日：2022-09-28
Applicant: SanDisk Technologies LLC
Inventor： Anirudh Amarnath , Aravind Suresh , Abhijith Prakash
CPC classification number: G11C16/26 , G11C16/102 , G11C16/24
Abstract: Systems and methods for bit line modulation to compensate for cell source variation are disclosed. For example, a method for reading data from non-volatile storage comprising determining a first bit line level based on a first programmed data state that is being sensed and determining a second bit line level based on a second programmed data state that is being sensed. As another example, a storage device comprising a first bit line driver configured to generate a first bit line level for a first set of bit lines corresponding to a first set of memory strings based on a first cell source level associated with the first set of memory strings a second bit line driver configured to generate a second bit line level for a second set of bit lines corresponding to a second set of memory strings based on a second cell source level associated with the second set of memory strings.
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30.发明公开公开(公告)号：US20230253056A1
公开(公告)日：2023-08-10
申请号：US17665267
申请日：2022-02-04
Applicant: SanDisk Technologies LLC
Inventor： Xiang Yang , Abhijith Prakash
CPC classification number: G11C16/3459 , G11C16/08 , G11C16/14 , G11C16/28 , G11C16/102 , G11C16/3404
Abstract: A memory apparatus and method of operation are provided. The apparatus includes memory cells connected to word lines including a dummy word line and other data word lines. The memory cells are disposed in memory holes and configured to retain a threshold voltage. A control means is coupled to the word lines and the memory holes and is configured to determine whether one of the word lines being programmed in a program operation is a particular one of the word lines adjacent the dummy word line needing a dummy positioning operation. The control means is also configured to program the memory cells connected to the dummy word line to adjust the threshold voltage to a predetermined position threshold voltage in the dummy positioning operation in response to determining the one of the plurality of word lines being programmed in the program operation is the particular one of the word lines.
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