Solid-state imaging device, imaging device, electronic equipment, A/D converter and A/D conversion method
    21.
    发明授权
    Solid-state imaging device, imaging device, electronic equipment, A/D converter and A/D conversion method 有权
    固态成像装置,成像装置,电子设备,A / D转换器和A / D转换方法

    公开(公告)号:US08743254B2

    公开(公告)日:2014-06-03

    申请号:US13936563

    申请日:2013-07-08

    申请人: Sony Corporation

    IPC分类号: H04N5/335 H01L27/00

    摘要: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

    摘要翻译: 在参考信号比较AD转换方案中,比较参考信号SLP_ADC和像素信号电压VX的P和D相位中的每一个。 基于比较结果对计数时钟CKcnt1进行计数。 计数结果数据被转换为信号数据Dsig,也就是也经历CDS的P相和D相之间的差。 此时,对像素信号电压VX的P相和D相进行n位AD转换,然后进行数字积分的求和。 这可以防止可能由模拟域中的相加引起的任何可能的有害影响。 虽然信号数据变为W倍,噪声可能会增加到更多的√W倍。 这减轻了AD转换产生的随机噪声的问题,例如量化噪声和模拟域中不存在的电路噪声,从而降低噪声。

    SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD
    22.
    发明申请
    SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD 有权
    固态成像装置,成像装置,电子设备,A / D转换器和A / D转换方法

    公开(公告)号:US20130293754A1

    公开(公告)日:2013-11-07

    申请号:US13936563

    申请日:2013-07-08

    申请人: Sony Corporation

    IPC分类号: H04N5/357 H03M1/34 H04N5/378

    摘要: In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage VX are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage VX, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

    摘要翻译: 在参考信号比较AD转换方案中,比较参考信号SLP_ADC和像素信号电压VX的P和D相位中的每一个。 基于比较结果对计数时钟CKcnt1进行计数。 计数结果数据被转换为信号数据Dsig,也就是也经历CDS的P相和D相之间的差。 此时,对像素信号电压VX的P相和D相进行n位AD转换,然后进行数字积分的求和。 这可以防止可能由模拟域中的相加引起的任何可能的有害影响。 虽然信号数据变为W倍,噪声可能会增加到更多的√W倍。 这减轻了AD转换产生的随机噪声的问题,例如量化噪声和模拟域中不存在的电路噪声,从而降低噪声。

    Conversation of pixel data into compression format of pixels

    公开(公告)号:US10362220B2

    公开(公告)日:2019-07-23

    申请号:US14646940

    申请日:2013-11-18

    申请人: SONY CORPORATION

    摘要: The present technique relates to an image sensor, an data transmission method thereof, an information processing apparatus, an information processing method, an electronic device, and a program with which it is made possible to improve flexibility in compression and to make connectivity between an image sensor and a DSP better.Data Pixel4*N to Pixel4*N+3 in a 12-bit original image data format of four pixels is converted into six-bit compression data and is arranged by two pixels into a 12-bit compression data format including a structure identical to that of a 12-bit original image data format, whereby data Data2*N and Data2*N+1 is configured. Moreover, upper eight bits of each of compression data formats Data2*N and Data2*N+1 are read and arranged into data Byte3*N and Byte3*N+1. Lower four bits of each of the compression data format Data2*N and Data2*N+1 are arranged into data Byte3*N+2. The present technique can be applied to an imaging apparatus.

    IMAGE PICKUP CIRCUIT, CMOS SENSOR, AND IMAGE PICKUP DEVICE
    27.
    发明申请
    IMAGE PICKUP CIRCUIT, CMOS SENSOR, AND IMAGE PICKUP DEVICE 审中-公开
    图像拾取电路,CMOS传感器和图像拾取器件

    公开(公告)号:US20160182844A1

    公开(公告)日:2016-06-23

    申请号:US15058845

    申请日:2016-03-02

    申请人: Sony Corporation

    IPC分类号: H04N5/378

    摘要: Disclosed herein is an image pickup circuit including: amplifying means for amplifying a charge corresponding to an amount of light received by a photodetector, and outputting a pixel signal; ramp signal generating means for generating a ramp signal whose voltage drops with a fixed slope from a predetermined initial voltage; and comparing means for comparing the pixel signal output by the amplifying means with the ramp signal output by the ramp signal generating means. A reference potential of the pixel signal output by the amplifying means and a reference potential of the ramp signal output by the ramp signal generating means are at a same level.

    摘要翻译: 本文公开了一种图像拾取电路,包括:放大装置,用于放大对应于由光电检测器接收的光量的电荷,并输出像素信号; 斜坡信号产生装置,用于产生其电压以预定的初始电压以固定斜率下降的斜坡信号; 以及比较装置,用于将由放大装置输出的像素信号与由斜坡信号产生装置输出的斜坡信号进行比较。 由放大装置输出的像素信号的参考电位和由斜坡信号发生装置输出的斜坡信号的参考电位处于相同电平。

    Reference voltage circuit and image-capture circuit

    公开(公告)号:US09288416B2

    公开(公告)日:2016-03-15

    申请号:US14716528

    申请日:2015-05-19

    申请人: Sony Corporation

    摘要: A reference voltage circuit for generating a reference voltage to be referred when a pixel signal is digitally converted, includes ramp voltage generating means for generating a ramp voltage which drops from a predetermined initial voltage at a certain gradient, a transistor for forming, together with the ramp voltage generating means, a current mirror circuit, and gain change means for changing a current value of a current flowing from a predetermined power supply via the transistor to change the gradient of the ramp voltage generated by the ramp voltage generating means.

    REFERENCE VOLTAGE CIRCUIT AND IMAGE-CAPTURE CIRCUIT

    公开(公告)号:US20150256782A1

    公开(公告)日:2015-09-10

    申请号:US14716528

    申请日:2015-05-19

    申请人: SONY CORPORATION

    IPC分类号: H04N5/3745

    摘要: A reference voltage circuit for generating a reference voltage to be referred when a pixel signal is digitally converted, includes ramp voltage generating means for generating a ramp voltage which drops from a predetermined initial voltage at a certain gradient, a transistor for forming, together with the ramp voltage generating means, a current mirror circuit, and gain change means for changing a current value of a current flowing from a predetermined power supply via the transistor to change the gradient of the ramp voltage generated by the ramp voltage generating means.

    SOLID-STATE IMAGING DEVICE AND DRIVING METHOD OF SOLID-STATE IMAGING DEVICE, AND ELECTRONIC EQUIPMENT
    30.
    发明申请
    SOLID-STATE IMAGING DEVICE AND DRIVING METHOD OF SOLID-STATE IMAGING DEVICE, AND ELECTRONIC EQUIPMENT 有权
    固态成像装置和固态成像装置的驱动方法及电子设备

    公开(公告)号:US20150163403A1

    公开(公告)日:2015-06-11

    申请号:US14405045

    申请日:2013-05-30

    申请人: SONY CORPORATION

    IPC分类号: H04N5/232 H04N5/3745

    摘要: The solid-state imaging device of the present disclosure includes a signal processing unit including an AD converter that digitizes an analog pixel signal read from each pixel of the pixel array unit to a signal line, the signal processing unit transferring digitized pixel data at a first speed higher than a frame rate; a memory unit that stores the pixel data transferred from the signal processing unit; a data processing unit that reads pixel data at a second speed lower than the first speed from the memory unit; and a control unit that, when the pixel data is read from the memory unit, controls to stop operation of a current source connected with the signal line and operation of at least the AD converter of the signal processing unit.

    摘要翻译: 本公开的固态成像装置包括信号处理单元,该信号处理单元包括将从像素阵列单元的每个像素读取的模拟像素信号数字化为信号线的AD转换器,所述信号处理单元将第一数字化像素数据 速度高于帧率; 存储单元,存储从所述信号处理单元传送的像素数据; 数据处理单元,从存储单元读取低于第一速度的第二速度的像素数据; 以及控制单元,当从存储单元读取像素数据时,控制停止与信号线连接的电流源的操作和至少信号处理单元的AD转换器的操作。