公开(公告)号：US10658578B2

公开(公告)日：2020-05-19

申请号：US16168369

申请日：2018-10-23

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pierre Morin ,  Didier Dutartre

IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

Abstract: A memory cell includes a phase-change material. A via is connected to a transistor and an element for heating the phase-change material. A layer made of a material (which is one of electrically insulating or has an electric resistivity greater than 2.5·10−5 Ω·m and which is sufficiently thin to be crossable by an electric current due to a tunnel-type effect) is positioned between the via and the heating element. Interfaces between the layer and materials in contact with surfaces of said layer form a thermal barrier.

公开(公告)号：US10535552B2

公开(公告)日：2020-01-14

申请号：US15892696

申请日：2018-02-09

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre ,  Herve Jaouen

IPC: H01L21/762 ,  H01L21/02

Abstract: A semiconductor wafer suitable for fabricating an SOI substrate is provided by: producing a first layer of polycrystalline semiconductor on a top side of a semiconductor carrier; then forming an interface zone on a top side of the first layer, wherein the interface zone has a structure different from a crystal structure of the first layer; and then producing a second layer of polycrystalline semiconductor on the interface zone.

公开(公告)号：US20170103913A1

公开(公告)日：2017-04-13

申请号：US15129328

申请日：2015-03-27

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre ,  Herve Jaouen

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/7624 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/763 ,  H01L29/04

Abstract: A semiconductor wafer suitable for fabricating an SOI substrate is provided by: producing a first layer of polycrystalline semiconductor on a top side of a semiconductor carrier; then forming an interface zone on a top side of the first layer, wherein the interface zone has a structure different from a crystal structure of the first layer; and then producing a second layer of polycrystalline semiconductor on the interface zone.

公开(公告)号：US20150364520A1

公开(公告)日：2015-12-17

申请号：US14738529

申请日：2015-06-12

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre

IPC: H01L27/146

CPC classification number: H01L31/02327 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/0232 ,  H01L31/0352 ,  H01L31/042

Abstract: The disclosure relates to an image sensor comprising a substrate region in a semiconductor material; an active layer in contact with the substrate region; and a photodiode array formed in the active layer. The substrate region has a doping level such that the resistivity of the substrate region is less than 6 mOhm•cm.

Abstract translation: 本公开涉及一种包括半导体材料中的衬底区域的图像传感器; 与所述衬底区域接触的有源层; 以及形成在有源层中的光电二极管阵列。 衬底区域具有使得衬底区域的电阻率小于6mOhm·cm的掺杂水平。

公开(公告)号：US20180166318A1

公开(公告)日：2018-06-14

申请号：US15892696

申请日：2018-02-09

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre ,  Herve Jaouen

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/7624 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/763 ,  H01L29/04

Abstract: A semiconductor wafer suitable for fabricating an SOI substrate is provided by: producing a first layer of polycrystalline semiconductor on a top side of a semiconductor carrier; then forming an interface zone on a top side of the first layer, wherein the interface zone has a structure different from a crystal structure of the first layer; and then producing a second layer of polycrystalline semiconductor on the interface zone.

公开(公告)号：US09312408B2

公开(公告)日：2016-04-12

申请号：US14738529

申请日：2015-06-12

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre

IPC: H01L31/0232 ,  H01L27/146 ,  H01L31/0352 ,  H01L31/042

CPC classification number: H01L31/02327 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14645 ,  H01L27/14689 ,  H01L31/0232 ,  H01L31/0352 ,  H01L31/042

Abstract: The disclosure relates to an image sensor comprising a substrate region in a semiconductor material; an active layer in contact with the substrate region; and a photodiode array formed in the active layer. The substrate region has a doping level such that the resistivity of the substrate region is less than 6 mOhm·cm.

Abstract translation: 本公开涉及一种包括半导体材料中的衬底区域的图像传感器; 与所述衬底区域接触的有源层; 以及形成在有源层中的光电二极管阵列。 衬底区域具有使得衬底区域的电阻率小于6mOhm·cm的掺杂水平。

公开(公告)号：US20170271392A1

公开(公告)日：2017-09-21

申请号：US15617748

申请日：2017-06-08

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre

IPC: H01L27/146 ,  H01L21/762 ,  H01L27/12

CPC classification number: H01L27/14629 ,  H01L21/7624 ,  H01L21/76264 ,  H01L27/1203 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14689

Abstract: A front-side image sensor may include a substrate in a semiconductor material and an active layer in the semiconductor material. The front side image sensor may also include an array of photodiodes formed in the active layer and an insulating layer between the substrate and the active layer.

公开(公告)号：US20130075870A1

公开(公告)日：2013-03-28

申请号：US13622573

申请日：2012-09-19

Applicant: STMicoelectronics (Crolles 2) SAS ,  STMicroelectronics SA,

Inventor： Didier Dutartre ,  Michel Marty ,  Sebastien Jouan

IPC: H01L21/3105 ,  H01L23/58

CPC classification number: H01L21/76898 ,  H01L21/76251

Abstract: A device and corresponding fabrication method includes a vertical stack having an intermediate layer between a lower region and an upper region. The intermediate layer is extended by a protection layer. The vertical stack has a free lateral face on which the lower region, the upper region and the protection layer are exposed.

Abstract translation: 一种器件和相应的制造方法包括在下部区域和上部区域之间具有中间层的垂直堆叠。 中间层由保护层延伸。 垂直堆叠具有自由侧面，下部区域，上部区域和保护层暴露在该侧面上。

公开(公告)号：US09929039B2

公开(公告)日：2018-03-27

申请号：US15129328

申请日：2015-03-27

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre ,  Herve Jaouen

IPC: H01L29/04 ,  H01L21/763 ,  H01L21/762 ,  H01L21/02

CPC classification number: H01L21/7624 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/763 ,  H01L29/04

Abstract: A semiconductor wafer suitable for fabricating an SOI substrate is provided by: producing a first layer of polycrystalline semiconductor on a top side of a semiconductor carrier; then forming an interface zone on a top side of the first layer, wherein the interface zone has a structure different from a crystal structure of the first layer; and then producing a second layer of polycrystalline semiconductor on the interface zone.

公开(公告)号：US09704903B2

公开(公告)日：2017-07-11

申请号：US14840164

申请日：2015-08-31

Applicant: STMicroelectronics SA

Inventor： Didier Dutartre

IPC: H01L27/14 ,  H01L27/146 ,  H01L21/762 ,  H01L27/12

CPC classification number: H01L27/14629 ,  H01L21/7624 ,  H01L21/76264 ,  H01L27/1203 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14689

Abstract: A front-side image sensor may include a substrate in a semiconductor material and an active layer in the semiconductor material. The front side image sensor may also include an array of photodiodes formed in the active layer and an insulating layer between the substrate and the active layer.