Nonvolatile memory devices and methods of operating a nonvolatile memory

    公开(公告)号:US10937508B2

    公开(公告)日:2021-03-02

    申请号:US16364588

    申请日:2019-03-26

    Abstract: Nonvolatile memory device includes a memory cell array including pages, each of the pages including memory cells storing data bits, each of the data bits being selectable by a different threshold voltage, a page buffer circuit coupled to the memory cell array through bit-lines, the page buffer circuit including page buffers to sense data from selected memory cells, and perform a first read operation and a second read operation, each including two sequential sensing operations to determine one data state, and each of the page buffers including a latch configured to sequentially store results of the two sequential sensing operations, and a control circuit to control the page buffers to store a result of the first read operation, reset the latches after completion of the first read operation, and perform the second read operation based on a valley determined based on the result of the first read operation.

    Electronic device
    25.
    外观设计

    公开(公告)号:USD1016030S1

    公开(公告)日:2024-02-27

    申请号:US29850649

    申请日:2022-08-22

    Abstract: FIG. 1 is a front perspective view of an electronic device showing our new design;
    FIG. 2 is a front elevation view thereof;
    FIG. 3 is a rear elevation view thereof;
    FIG. 4 is a left side elevation view thereof;
    FIG. 5 is a right side elevation view thereof;
    FIG. 6 is a top plan view thereof;
    FIG. 7 is a bottom plan view thereof; and,
    FIG. 8 is a rear perspective view thereof.
    The dashed broken lines in the figures illustrate portions of the electronic device that form no part of the claimed design. The dot-dash broken lines in FIGS. 1-3 and 6-8 a claim boundary only and form no part at the claimed design.

    Electronic device
    26.
    外观设计

    公开(公告)号:USD1006773S1

    公开(公告)日:2023-12-05

    申请号:US29850651

    申请日:2022-08-22

    Abstract: FIG. 1 is a front perspective view of an electronic device showing our new design;
    FIG. 2 is a front elevation view thereof;
    FIG. 3 is a rear elevation view thereof;
    FIG. 4 is a left side elevation view thereof;
    FIG. 5 is a right side elevation view thereof;
    FIG. 6 is a top plan view thereof;
    FIG. 7 is a bottom plan view thereof; and,
    FIG. 8 is a rear perspective view thereof.
    The dashed broken lines in the figures illustrate portions of the electronic device that form no part of the claimed design.

    Electronic device
    27.
    外观设计

    公开(公告)号:USD997146S1

    公开(公告)日:2023-08-29

    申请号:US29816217

    申请日:2021-11-19

    Abstract: FIG. 1 is a front perspective view of an electronic device showing our new design according to a first embodiment;
    FIG. 2 is a front elevation view thereof;
    FIG. 3 is a rear elevation view thereof;
    FIG. 4 is a left side elevation view thereof;
    FIG. 5 is a right side elevation view thereof;
    FIG. 6 is a top plan view thereof;
    FIG. 7 is a bottom plan view thereof;
    FIG. 8 is a rear perspective view thereof;
    FIG. 9 is a front perspective view of an electronic device showing our new design according to a second embodiment;
    FIG. 10 is a front elevation view thereof;
    FIG. 11 is a rear elevation view thereof;
    FIG. 12 is a left side elevation view thereof;
    FIG. 13 is a right side elevation view thereof;
    FIG. 14 is a top plan view thereof;
    FIG. 15 is a bottom plan view thereof; and,
    FIG. 16 is a rear perspective view thereof.
    The evenly dashed broken lines in the drawings illustrate portions of the electronic device that form no part of the claimed design.

    Non-volatile memory device and erasing method of the same

    公开(公告)号:US11081186B2

    公开(公告)日:2021-08-03

    申请号:US17019889

    申请日:2020-09-14

    Abstract: Provided are a non-volatile memory device and an erasing method thereof. The non-volatile memory device including a memory cell region includes first metal pads and a memory block, the memory block being disposed in a memory cell region and includes a plurality of cell strings having a plurality of memory cells stacked in a direction perpendicular to a substrate between a plurality of bit line and a common source line of the memory block, and a peripheral circuit region including second metal pads and a control logic, and vertically connected to the memory cell region by the first metal pads and the second metal pads, wherein the control logic configured to, perform control such that a first erase voltage is provided to the plurality of bit lines and the common source line, and a first erase control voltage is provided to a plurality of first selection lines and a second selection line during a first erase period, the plurality of first selection lines being used for selecting a corresponding cell string from among the plurality of cell strings and the second selection line being disposed closest to the common source line, and perform control such that a second erase voltage is provided to the plurality of bit lines, and such that a second erase control voltage is provided to at least one first selection line among the plurality of first selection lines during a second erase period, the second erase control voltage being lower than the first erase control voltage.

    Electronic device and method for processing user speech

    公开(公告)号:US10803862B2

    公开(公告)日:2020-10-13

    申请号:US15957452

    申请日:2018-04-19

    Abstract: An electronic device and method are provided for processing user speech. The electronic device includes a housing, a touchscreen display disposed in the housing and exposed through a first portion of the housing, a microphone disposed in the housing and exposed through a second portion of the housing, at least one speaker disposed in the housing and exposed through a third portion of the housing, a wireless communication circuit disposed in the housing, at least one processor disposed in the housing and electrically connected with the touchscreen display, the microphone, the speaker, and the wireless communication circuit, and a memory disposed in the housing and electrically connected with the processor, wherein the memory stores instructions executed to enable the at least one processor to receive a first user input through the touchscreen display or the microphone, the first user input including a request to perform tasks using the electronic device, send data associated with the first user input through the wireless communication circuit to an external server, receive a response from the external server through the wireless communication circuit, the response including information about a plurality of states of the electronic device to perform the tasks in an order, perform the tasks by causing the electronic device to have the plurality of states having the order after receiving the response, receive a second user input through the touchscreen display or the microphone, the second user input including a request to cancel at least one of the performed tasks, and cause the electronic device to return to one of the plurality of states, based on the second user input.

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