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公开(公告)号:US11721565B2
公开(公告)日:2023-08-08
申请号:US16690498
申请日:2019-11-21
发明人: Yong Jun Choi , Seok Hoon Kim , Young-Hoo Kim , In Gi Kim , Sung Hyun Park , Seung Min Shin , Kun Tack Lee , Jinwoo Lee , Hun Jae Jang , Ji Hoon Cha
IPC分类号: H01L21/67 , H01L21/687 , B08B3/08
CPC分类号: H01L21/67167 , B08B3/08 , H01L21/67034 , H01L21/67051 , H01L21/67063 , H01L21/68707
摘要: A multi-chamber apparatus for processing a wafer, the apparatus including a high etch rate chamber to receive the wafer and to etch silicon nitride with a phosphoric acid solution; a rinse chamber to receive the wafer and to clean the wafer with an ammonia mixed solution; and a supercritical drying chamber to dry the wafer with a supercritical fluid.
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公开(公告)号:US20230165174A1
公开(公告)日:2023-05-25
申请号:US17938200
申请日:2022-10-05
发明人: Changyup Park , Dongho Ahn , Donggeon Gu , Wonjun Park , Jinwoo Lee
CPC分类号: H01L45/128 , H01L27/2454 , H01L45/06 , H01L45/124 , H01L45/144 , H01L45/1253
摘要: A semiconductor device includes gate electrodes on a substrate, a channel and a resistance pattern. The gate electrodes are spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate. The channel extends through the gate electrodes in the vertical direction on the substrate. The resistance pattern includes a phase-changeable material. The resistance pattern includes a first vertical extension portion on a sidewall of the channel and extending in the vertical direction, a first protrusion portion on an inner sidewall of the first vertical extension portion and protruding in a horizontal direction substantially parallel to the upper surface of the substrate, and a second protrusion portion on an outer sidewall of the first vertical extension portion and protruding in the horizontal direction and not overlapping the first protrusion portion in the horizontal direction.
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公开(公告)号:US09775184B2
公开(公告)日:2017-09-26
申请号:US14509160
申请日:2014-10-08
发明人: Jinwoo Lee , Jiyeon Seo , Myunghwan Lee , Yongcheol Cha
摘要: Disclosed herein are a method and apparatus for pairing terminals using a sound wave. A sound wave is transmitted from a first terminal to a second terminal and a response is sent by the second terminal and detected by the first terminal. The first terminal and the second terminal are paired based at least partially on the sound wave signal and the response signal.
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公开(公告)号:US20170244688A1
公开(公告)日:2017-08-24
申请号:US15519508
申请日:2015-10-15
发明人: Jaehwan Kim , Junghun Kim , Jinwoo Lee , Yongjoon Jeon , Bokun Choi , Jongmu Choi , Dongeup Ham , Dongwoo Kim , Sangmi Park
IPC分类号: H04L29/06
CPC分类号: H04L63/062 , G06F21/31 , G06F21/6218 , G06F2221/2115 , H04L63/08 , H04L63/0861 , H04L63/107
摘要: In an authentication method according to an embodiment, an electronic device receives an authentication request message based on identification information from a server apparatus. In response to the authentication request message, the electronic device receives at least one of an input for authentication approval of a specific device and an input for authentication approval of a service offered through the specific device. Then, in response to the input, the electronic device transmits authentication approval information to the server apparatus.
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公开(公告)号:US11812619B2
公开(公告)日:2023-11-07
申请号:US17227852
申请日:2021-04-12
发明人: Jinwoo Lee , Zhe Wu , Dongsung Choi , Chungman Kim , Seunggeun Yu , Jabin Lee , Soyeon Choi
CPC分类号: H10B63/84 , H10N70/826 , H10N70/841
摘要: A resistive memory device includes a first conductive line extending in a first horizontal direction on a substrate, a plurality of second conductive lines separated from the first conductive line in a vertical direction and extending in a second horizontal direction intersecting with the first horizontal direction, on the substrate, a plurality of memory cells respectively connected between the first conductive line and one second conductive line selected from among the plurality of second conductive lines at a plurality of intersection points between the first conductive line and the plurality of second conductive lines, each of the plurality of memory cells including a selection device and a resistive memory pattern, and a bottom electrode shared by the plurality of memory cells, the bottom electrode having a variable thickness in the first horizontal direction, and including a top surface having a concave-convex shape.
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公开(公告)号:US11444127B2
公开(公告)日:2022-09-13
申请号:US17019649
申请日:2020-09-14
发明人: Jinwoo Lee , Kwangmin Park , Zhe Wu
摘要: A memory device including a first conductive line on a substrate and extending in a first horizontal direction; a second conductive line on the first conductive line and extending in a second horizontal direction that is perpendicular to the first horizontal direction; and a memory cell between the first conductive line and the second conductive line, the memory cell including a variable resistance memory layer, a buffer resistance layer, and a switch material pattern, extending in a vertical direction that is perpendicular to the first horizontal direction and the second horizontal direction, and having a tapered shape with a decreasing horizontal width along the vertical direction, wherein at least a part of the variable resistance memory layer and at least a part of the buffer resistance layer of the memory cell are at a same vertical level.
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27.
公开(公告)号:US11211427B2
公开(公告)日:2021-12-28
申请号:US16386893
申请日:2019-04-17
发明人: Jinwoo Lee , Zhe Wu , Kyubong Jung , Seung-geun Yu , Ja Bin Lee
摘要: A switching element includes a lower barrier electrode disposed on a substrate, a switching pattern disposed on the lower barrier electrode, and an upper barrier electrode disposed on the switching pattern. The switching pattern includes a first switching pattern, and a second switching pattern disposed on the first switching pattern and having a density different from a density of the first switching pattern.
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28.
公开(公告)号:US10777745B2
公开(公告)日:2020-09-15
申请号:US16364232
申请日:2019-03-26
发明人: Seung-Geun Yu , Zhu Wu , Ja Bin Lee , Jung Moo Lee , Jinwoo Lee , Kyubong Jung
摘要: A switching element includes a lower barrier electrode on a substrate, a switching pattern on the lower barrier electrode, and an upper barrier electrode on the switching pattern. The lower barrier electrode includes a first lower barrier electrode layer, and a second lower barrier electrode layer interposed between the first lower barrier electrode layer and the switching pattern and whose density is different from the density of the first lower barrier electrode.
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公开(公告)号:US10735390B2
公开(公告)日:2020-08-04
申请号:US15519508
申请日:2015-10-15
发明人: Jaehwan Kim , Junghun Kim , Jinwoo Lee , Yongjoon Jeon , Bokun Choi , Jongmu Choi , Dongeup Ham , Dongwoo Kim , Sangmi Park
摘要: In an authentication method according to an embodiment, an electronic device receives an authentication request message based on identification information from a server apparatus. In response to the authentication request message, the electronic device receives at least one of an input for authentication approval of a specific device and an input for authentication approval of a service offered through the specific device. Then, in response to the input, the electronic device transmits authentication approval information to the server apparatus.
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30.
公开(公告)号:US10231255B2
公开(公告)日:2019-03-12
申请号:US14907802
申请日:2014-07-24
发明人: Hoon Huh , Jinwoo Lee , Myoungseok Kim
IPC分类号: H04W72/12
摘要: Disclosed are an apparatus and a method for providing effective scheduling of resources of each cell and each carrier to a User Equipment (UE) when there are a plurality of cells and carriers in a carrier aggregation mobile communication system. A communication method of a Base Station (BS) includes: obtaining a mapping relation between a cell and a carrier for each UE; receiving scheduling information for each cell; distributing data of each UE to one of cells corresponding to UEs by using the mapping relation between the carrier and the cell and the scheduling information for each cell; and scheduling the distributed data. When a multi-carrier multi-cell scheduler to which a carrier aggregation technology is applied is implemented, the existing single carrier single cell scheduler can be re-used and the time required for the scheduling can be reduced by processing schedulers in parallel.
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