公开(公告)号：US09048235B2

公开(公告)日：2015-06-02

申请号：US14167989

申请日：2014-01-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Seok Choi

IPC: H01L25/07 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065 ,  H01L21/66

CPC classification number: H01L25/50 ,  H01L22/14 ,  H01L22/20 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L24/81 ,  H01L24/03 ,  H01L2224/81 ,  H01L2224/03

Abstract: A stack package includes a first semiconductor chip having a plurality of first pads, and a second semiconductor chip stacked on the first semiconductor chip and having a plurality of second pads corresponding to the first pads respectively, the second pads connected to the corresponding first pads. The first and second pads are arranged such that the first and second pads overlap with each other even after the first and second semiconductor chips are rotated relative to each other by a predetermined angle.

Abstract translation: 堆叠封装包括具有多个第一焊盘的第一半导体芯片和堆叠在第一半导体芯片上并且分别具有与第一焊盘对应的多个第二焊盘的第二半导体芯片，第二焊盘连接到对应的第一焊盘。 即使在第一和第二半导体芯片相对于彼此旋转预定角度之后，第一和第二焊盘被布置成使得第一焊盘和第二焊盘彼此重叠。

公开(公告)号：US08847378B2

公开(公告)日：2014-09-30

申请号：US13738322

申请日：2013-01-10

Applicant: Samsung Electronics Co., Ltd

Inventor： Yun-Seok Choi ,  Tae-je Cho

IPC: H01L23/02 ,  H01L23/48 ,  H01L25/10 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/0652 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/5389 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11

Abstract: A semiconductor package includes a first semiconductor package, a second semiconductor package, and a package-connecting member. The first semiconductor package includes a first substrate, a chip stacking portion disposed on the first substrate and including a plurality of first semiconductor chips, and a first sealant for surrounding the chip stacking portion on the first substrate. The second semiconductor package includes a second substrate, at least one second semiconductor chip disposed on the second substrate, and a second sealant for surrounding the second semiconductor chip on the second substrate. The package-connecting member electrically connects the first semiconductor package and the second semiconductor package. The plurality of first semiconductor chips include a first chip including through silicon vias (TSVs) and a second chip electrically connected to the first chip via the TSVs, and the chip stacking portion includes an internal sealant for filling a space between the first chip and the second chip and extending to a side of the second chip.

Abstract translation: 半导体封装包括第一半导体封装，第二半导体封装和封装连接元件。 第一半导体封装包括第一衬底，设置在第一衬底上并包括多个第一半导体芯片的芯片堆叠部分，以及用于围绕第一衬底上的芯片堆叠部分的第一密封剂。 第二半导体封装包括第二衬底，设置在第二衬底上的至少一个第二半导体芯片和用于围绕第二衬底上的第二半导体芯片的第二密封剂。 封装连接部件电连接第一半导体封装和第二半导体封装。 多个第一半导体芯片包括通过硅通孔（TSV）的第一芯片和通过TSV与第一芯片电连接的第二芯片，并且芯片堆叠部分包括用于填充第一芯片和第二芯片之间的空间的内部密封剂 第二芯片并且延伸到第二芯片的一侧。

公开(公告)号：US20140135029A1

公开(公告)日：2014-05-15

申请号：US14078291

申请日：2013-11-12

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： Yun-Seok Choi ,  Keun-Chul Hwang ,  Hee-Won Kang

IPC: H04W72/08 ,  H04L5/00

CPC classification number: H04W72/082 ,  H04J11/003 ,  H04J11/005 ,  H04L5/0032 ,  H04W16/00

Abstract: A method for mitigating inter-cell interference by a base station in a cellular communication system. The base station determines cells to which same frequency resources are allocated, and which cause interference to each other, and determines a starting time slot, at which resource allocation to each cell starts, as a different time slot for each cell, taking into account a number of the cells and time slots constituting time resources. In response to receiving a call setup request from a terminal, the base station selects a time slot taking into account interference information of each of the time slots, and allocates a resource based on the selected time slot to the terminal.

Abstract translation: 一种用于在蜂窝通信系统中减轻基站的小区间干扰的方法。 基站确定分配相同频率资源并且导致彼此干扰的小区，并且确定每个小区的资源分配开始时的起始时隙作为每个小区的不同时隙，同时考虑到 组成时间资源的单元和时隙的数量。 响应于从终端接收到呼叫建立请求，基站考虑到每个时隙的干扰信息来选择时隙，并且基于所选择的时隙将资源分配给终端。