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公开(公告)号：US09633740B1
公开(公告)日：2017-04-25
申请号：US15041501
申请日：2016-02-11
Applicant: Seagate Technology LLC
Inventor： AbdelHakim S. Alhussien , Sundararajan Sankaranarayanan , Thuy Van Nguyen , Ludovic Danjean , Erich F. Haratsch
CPC classification number: G11C16/26 , G11C7/1006 , G11C11/5642 , G11C16/16 , G11C16/28 , G11C16/3418 , G11C16/3431 , H03M13/1111 , H03M13/1125 , H03M13/3746 , H03M13/6325
Abstract: Read retry operations in a memory employ likelihood value assignments that change sign at different read voltages for a plurality of read retry operations. A method for multiple read retries of a memory comprises reading a codeword using a first read voltage to obtain a first read value; mapping the first read value to first likelihood values based on a first likelihood value assignment that changes sign substantially at the first read voltage; reading the codeword using a second read voltage to obtain a second read value, wherein the second read voltage is shifted from the first read voltage to compensate for an expected change in analog voltages; and mapping the second read value to second likelihood values based on a second likelihood value assignment, wherein the second likelihood value assignment changes sign substantially at the second read voltage. Read data is optionally generated using iterative decoding of the codeword based on the first likelihood values and/or the second likelihood values.
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公开(公告)号：US09620202B2
公开(公告)日：2017-04-11
申请号：US14087520
申请日：2013-11-22
Applicant: Seagate Technology LLC
Inventor： Zhengang Chen , Erich F. Haratsch , Sundararajan Sankaranarayanan
CPC classification number: G11C16/28 , G06F3/0611 , G06F3/0634 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G06F11/1402 , G11C7/14 , G11C11/56 , G11C11/5642 , G11C16/26 , G11C16/3454 , G11C16/349 , G11C29/021 , G11C29/028
Abstract: Channel information and channel conditions that are determined by an Offline Tracking process are used to determine whether or not an adjustment to the read reference voltage can be avoided altogether without detrimentally affecting performance, or, alternatively, to determine a precision with which a read reference voltage adjustment should be made. If it is determined based on the channel conditions that a read reference voltage adjustment can be avoided altogether, read performance is improved by reducing the probability that a read reference voltage adjustment needs to be made during normal read operations. If it is determined based on the channel conditions that a read reference voltage adjustment needs to be made with a particular precision, the read reference voltage is adjusted with that precision. This latter approach is advantageous in that a determination that the precision with which the adjustments can be made is relatively low leads to fewer adjustments having to be made during normal read operations.
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23.发明授权Adjusting log likelihood ratio values to compensate misplacement of read voltages 有权调整对数似然比值以补偿读取电压的错位公开(公告)号：US09396792B2
公开(公告)日：2016-07-19
申请号：US14195058
申请日：2014-03-03
Applicant: Seagate Technology LLC
Inventor： Yunxiang Wu , Zhengang Chen , AbdelHakim S. Alhussien , Sundararajan Sankaranarayanan , Erich F. Haratsch
CPC classification number: G11C11/5642 , G06F11/1048 , G06F11/1072 , G11C29/52
Abstract: An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) perform one or more attempts of a soft-decision decode of data stored in the nonvolatile memory, where soft-decision decode uses a plurality of log likelihood ratio values stored in a table, (ii) generate one or more adjusted log likelihood ratio values by adding a constant value to one or more of the log likelihood ratio values in response to a failure to decode the data using the log likelihood ratio values and (iii) re-decode the data using the adjusted log likelihood ratio values.
Abstract translation: 公开了一种具有电路和与非易失性存储器的接口的装置。 电路被配置为（i）执行对存储在非易失性存储器中的数据的软判决解码的一个或多个尝试，其中软判决解码使用存储在表中的多个对数似然比值，（ii）生成一个 或更多调整的对数似然比值，通过将响应于使用对数似然比值对数据进行解码的一个或多个对数似然比值来增加常数值，以及（iii）使用调整后的记录重新解码数据 似然比值。
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公开(公告)号：US11500547B2
公开(公告)日：2022-11-15
申请号：US17168786
申请日：2021-02-05
Applicant: Seagate Technology, LLC
Inventor： Ludovic Danjean , Abdelhakim Alhussien , Sundararajan Sankaranarayanan , Erich Franz Haratsch
IPC: G06F3/06
Abstract: Systems and methods presented herein provide for mitigating errors in a storage device. In one embodiment, a storage system includes a storage device comprising a plurality of storage areas operable to store data, and a controller operable to evaluate operating conditions of the storage device, to perform a background scan on a first of the storage areas to characterize a read retention of the first storage area, and to adjust a read signal of the first storage area based on the characterized read retention and the operating conditions of the storage device.
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公开(公告)号：US20210181954A1
公开(公告)日：2021-06-17
申请号：US17168786
申请日：2021-02-05
Applicant: Seagate Technology, LLC
Inventor： Ludovic Danjean , Abdelhakim Alhussien , Sundararajan Sankaranarayanan , Erich Franz Haratsch
IPC: G06F3/06
Abstract: Systems and methods presented herein provide for mitigating errors in a storage device. In one embodiment, a storage system includes a storage device comprising a plurality of storage areas operable to store data, and a controller operable to evaluate operating conditions of the storage device, to perform a background scan on a first of the storage areas to characterize a read retention of the first storage area, and to adjust a read signal of the first storage area based on the characterized read retention and the operating conditions of the storage device.
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Patent Agency Ranking
公开(公告)号：US10707900B2
公开(公告)日：2020-07-07
申请号：US16389551
申请日：2019-04-19
Applicant: SEAGATE TECHNOLOGY LLC
Abstract: A data processing system includes a likelihood input operable to receive encoded data, a decoder operable to apply a decoding algorithm to likelihood values for the received encoded data and to yield a decoded output, and a decoder input initialization circuit operable to generate new decoder input values based in part on the likelihood values for the received encoded data after the likelihood values for the received encoded data have failed to converge in the decoder.
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公开(公告)号：US10705970B1
公开(公告)日：2020-07-07
申请号：US15594524
申请日：2017-05-12
Applicant: Seagate Technology LLC
Inventor： Sundararajan Sankaranarayanan , Erich Franz Haratsch
IPC: G06F12/10
Abstract: An apparatus may include a circuit configured to determine a first encoded address is in a bitwise range of addresses, determine a first physical address in a storage memory from the first encoded address using bitwise mapping and retrieve first data from the first physical address in the storage memory. The circuit may further be configured to determine a second encoded address is in an offset linear range of addresses, determine a second physical address in the storage memory from the second encoded address using offset linear mapping and write second data to the second physical address in the storage memory.
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公开(公告)号：US10298263B2
公开(公告)日：2019-05-21
申请号：US14218626
申请日：2014-03-18
Applicant: Seagate Technology, LLC
Abstract: A data processing system includes a likelihood input operable to receive encoded data, a decoder operable to apply a decoding algorithm to likelihood values for the received encoded data and to yield a decoded output, and a decoder input initialization circuit operable to generate new decoder input values based in part on the likelihood values for the received encoded data after the likelihood values for the received encoded data have failed to converge in the decoder.
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公开(公告)号：US10276247B2
公开(公告)日：2019-04-30
申请号：US15205654
申请日：2016-07-08
Applicant: Seagate Technology LLC
Inventor： AbdelHakim S. Alhussien , Sundararajan Sankaranarayanan , Thuy Van Nguyen , Ludovic Danjean , Erich F. Haratsch
Abstract: Methods and apparatus are provided for read retry operations that estimate written data based on syndrome weights. One method comprises reading a codeword from a memory multiple times using multiple read reference voltages; obtaining a syndrome weight for each of the readings of the codeword; identifying a given reading of the codeword having a substantially minimum syndrome weight; and estimating a written value of the codeword based on the given reading. Two cell voltage probability distributions of cell voltages are optionally calculated for each possible cell state of the memory, based on the estimated written value and plurality of readings of the codeword. The cell voltage probability distributions are used to (i) dynamically select log likelihood ratio values for a failing page, (ii) determine a read reference voltage that gives a desired log likelihood ratio value, or (iii) dynamically select log likelihood ratio values for the page populations associated with the distributions.
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公开(公告)号：US10180868B2
公开(公告)日：2019-01-15
申请号：US15639019
申请日：2017-06-30
Applicant: Seagate Technology LLC
IPC: G06F11/07 , G11C16/08 , G11C11/56 , G11C16/26 , G06F11/10 , G11C16/28 , G11C29/02 , G11C29/52 , H03M13/11 , H03M13/37 , H03M13/00 , G11C29/04
Abstract: Adaptive read threshold voltage tracking techniques are provided that employ bit error rate estimation based on a non-linear syndrome weight mapping. An exemplary device comprises a controller configured to determine a bit error rate for at least one of a plurality of read threshold voltages in a memory using a non-linear mapping of a syndrome weight to the bit error rate for the at least one of the plurality of read threshold voltages.
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