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    SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE
    21.
    发明申请
    SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220094177A1

    公开(公告)日：2022-03-24

    申请号：US17422314

    申请日：2020-01-14

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuki OKAMOTO ,  Takahiko ISHIZU ,  Kei TAKAHASHI ,  Takayuki IKEDA

    IPC: H02J7/00

    Abstract: A battery control circuit having a novel structure, a battery protection circuit having a novel structure, and a power storage device including the battery circuit are provided. A semiconductor device includes n cell balancing circuits that respectively correspond to one secondary battery and each include a transistor, a comparator circuit, and a capacitor. In each of the n cell balancing circuits, an inverting input terminal of the comparator circuit and one electrode of the capacitor are electrically connected to one of a source and a drain of the transistor. The semiconductor device has functions of supplying a ground potential to the other electrode of the capacitor; turning on the transistor; supplying a first potential to the one electrode of the capacitor; turning off the transistor; electrically connecting the other electrode of the capacitor and a negative electrode of the secondary battery corresponding to each cell balancing circuit; supplying a sum of the first potential and a potential of the negative electrode of the secondary battery corresponding to each cell balancing circuit, to the one electrode of the capacitor; and controlling charging of the secondary battery corresponding to each cell balancing circuit.

    IMAGING DEVICE
    22.
    发明申请
    IMAGING DEVICE 有权

    公开(公告)号：US20220077205A1

    公开(公告)日：2022-03-10

    申请号：US17517705

    申请日：2021-11-03

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuki OKAMOTO ,  Yoshiyuki KUROKAWA ,  Hiroki INOUE ,  Takuro OHMARU

    IPC: H01L27/146 ,  H01L21/8234 ,  H04N5/225 ,  H01L27/12 ,  H01L27/088 ,  H01L29/786 ,  H01L31/075

    Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

    SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE
    23.
    发明申请
    SEMICONDUCTOR DEVICE AND OPERATING METHOD OF SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210242690A1

    公开(公告)日：2021-08-05

    申请号：US17269330

    申请日：2019-08-21

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Yuki OKAMOTO ,  Takahiko ISHIZU

    IPC: H02J7/00 ,  H01L29/786 ,  H01L27/12 ,  H01M10/42 ,  H01M10/44

    Abstract: To provide a battery control circuit with a novel structure, a battery protection circuit with a novel structure, and a power storage device including the battery circuit. The semiconductor device includes n cell-balance circuits (n is an integer greater than or equal to 1). One secondary battery is electrically connected to one cell-balance circuit. The cell-balance circuit includes a comparison circuit, and a memory element is electrically connected to an inverting input terminal of the comparison circuit. The memory element includes a first transistor and a capacitor. A potential is retained. The retained potential changes in accordance with a change in a potential of a negative electrode of the secondary battery. The comparison circuit has a function of comparing the retained potential with a potential of a positive electrode of the secondary battery. Output from the comparison circuit controls a gate voltage of a second transistor electrically connected to the secondary battery in parallel. The first transistor includes a metal oxide including indium in a channel formation region.

    ANOMALY DETECTION SYSTEM FOR SECONDARY BATTERY
    24.
    发明申请
    ANOMALY DETECTION SYSTEM FOR SECONDARY BATTERY 有权

    公开(公告)号：US20210190471A1

    公开(公告)日：2021-06-24

    申请号：US17263170

    申请日：2019-07-24

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Takayuki IKEDA ,  Ryota TAJIMA ,  Yuki OKAMOTO ,  Shunpei YAMAZAKI

    IPC: G01B7/16 ,  H03K5/24 ,  H03K21/08 ,  H01L27/105 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

    Abstract: An anomaly detection system that outputs an anomaly detection signal before a safety valve of a secondary battery is opened is provided. The anomaly detection system includes a strain sensor, a memory, and a comparator. The memory has a function of retaining an analog potential, and the comparator has a function of comparing a potential output by the strain sensor and the analog potential retained by the memory. The strain sensor is attached to the secondary battery before use, and a predetermined potential is retained in the memory. When a housing of the secondary battery expands while the secondary battery is used, and the potential output by the strain sensor becomes higher (or lower) than the predetermined potential, an anomaly detection signal is output.

    METHOD FOR CONTROLLING POWER SUPPLY IN SEMICONDUCTOR DEVICE
    25.
    发明申请
    METHOD FOR CONTROLLING POWER SUPPLY IN SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200183483A1

    公开(公告)日：2020-06-11

    申请号：US16789480

    申请日：2020-02-13

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Yuki OKAMOTO ,  Yoshiyuki KUROKAWA

    IPC: G06F1/3234 ,  G11C11/412 ,  G06F1/3228 ,  H03K19/0175 ,  G11C11/40 ,  G06F13/42 ,  G06F1/3296 ,  G06F1/3293 ,  G06F1/3287

    Abstract: A method for controlling power supply in a semiconductor device including a CPU and a PLD which can hold data even in an off state is provided. The semiconductor device includes a processor, a programmable logic device, and a state control circuit. The programmable logic device includes a first nonvolatile memory circuit and has a function of holding data obtained by arithmetic processing of the programmable logic device when it is turned off. The state control circuit obtains data on the amount of a task performed by the programmable logic device in accordance with an operation of the processor. The programmable logic device detects the state of progress of the task and outputs a signal to the state control circuit. The state control circuit monitors the amount of the task and the state of progress of the task and turns off the programmable logic device when the task is completed.

    DATA CONVERSION CIRCUIT AND DISPLAY DEVICE
    26.
    发明申请
    DATA CONVERSION CIRCUIT AND DISPLAY DEVICE 审中-公开

    公开(公告)号：US20200020298A1

    公开(公告)日：2020-01-16

    申请号：US16469260

    申请日：2017-12-11

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Yuki OKAMOTO ,  Seiichi YONEDA

    IPC: G09G5/00 ,  G09G3/3275 ,  G09G3/3266

    Abstract: Image processing in accordance with the shape of a display device is performed at high speed with low power consumption, without the use of a large frame memory or a high-throughput GPU. Used is a data conversion circuit including: a latch circuit that takes in data from input data in synchronization with a writing clock signal and stores the data as writing data; a memory circuit that stores the writing data and outputs the writing data to an external circuit as readout data in synchronization with a readout clock signal; and a clock selection control circuit. The writing clock signal is one of a plurality of clock signals with different frequencies and is output in accordance with control by the clock selection control circuit.

    SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
    29.
    发明申请
    SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20170126176A1

    公开(公告)日：2017-05-04

    申请号：US15298305

    申请日：2016-10-20

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yuki OKAMOTO ,  Yoshiyuki KUROKAWA

    IPC: H03B5/06 ,  H01L27/092 ,  H01L29/786 ,  H03K3/03

    CPC classification number: H03B5/06 ,  H01L27/092 ,  H01L29/7869 ,  H03K3/014 ,  H03K3/0315

    Abstract: An oscillator capable of quick startup is provided. A transistor is provided between an output terminal of a certain stage inverter and an input terminal of the following stage inverter included in the voltage controlled oscillator. With the use of the on resistance of the transistor, the oscillation frequency of the clock signal is controlled. While supply of the power supply voltage is stopped, a signal that is input to the input terminal of the inverter just before supply of the power supply voltage is stopped is stored by turning off the transistor. This operation makes it possible to immediately output a clock signal that has the same frequency as that before supply of the power supply voltage is stopped at the time when the power supply voltage is supplied again.

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