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公开(公告)号：US11837620B2
公开(公告)日：2023-12-05
申请号：US17158537
申请日：2021-01-26
发明人： Hideki Yagi , Takuya Okimoto , Munetaka Kurokawa
IPC分类号： H01L27/146
CPC分类号： H01L27/14636 , H01L27/14641
摘要： A photo receiver includes a photo detector including a semiconductor substrate having a first main surface and a second main surface and a metal pattern layer provided on the second main surface; and a carrier including a supporting substrate having a third main surface facing the second main surface and a solder pattern layer provided on the third main surface. The solder pattern layer is bonded to the metal pattern layer. The first main surface is provided with a variable optical attenuator, an optical 90-degree hybrid device, and a plurality of photodiodes optically coupled to the variable optical attenuator via the optical 90-degree hybrid device. The solder pattern layer and the metal pattern layer are located in a peripheral area surrounding a central area where the variable optical attenuator and the optical 90-degree hybrid device are located when viewed in the normal direction of the first main surface.
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公开(公告)号：US10859766B2
公开(公告)日：2020-12-08
申请号：US16548171
申请日：2019-08-22
发明人： Yoshihiro Yoneda , Takuya Okimoto , Koji Ebihara , Hideki Yagi
摘要： An optical semiconductor device comprises a semiconductor substrate, an optical 90-degree hybrid circuit provided on the substrate, a plurality of input optical waveguides provided on the substrate, and a plurality of output optical waveguides provided on the substrate. The plurality of input optical waveguides is optically coupled to input ends of the optical 90-degree hybrid circuit. The plurality of output optical waveguides is optically coupled to output ends of the optical 90-degree hybrid circuit. Each of the plurality of input optical waveguides includes a first curving portion and a first straight portion adjacent to the first curving portion, and each of the plurality of output optical waveguides includes a second curving portion. A central axis of the first curving portion is inwardly offset with respect to a central axis of the first straight portion, and a central axis of the second curving portion follows a raised sine curve.
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公开(公告)号：US20190267412A1
公开(公告)日：2019-08-29
申请号：US16283191
申请日：2019-02-22
发明人： Hideki Yagi , Naoko Konishi , Koji Ebihara , Takuya Okimoto
IPC分类号： H01L27/144 , H01L31/0352 , H01L31/0232 , H01L31/105 , H01L31/0304 , H01L31/18 , G02B6/136 , G02B6/12 , G02B6/13
摘要： A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90° optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor.
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24.发明授权公开(公告)号：US09893100B2
公开(公告)日：2018-02-13
申请号：US15193814
申请日：2016-06-27
发明人： Yoshihiro Yoneda , Ryuji Masuyama , Hideki Yagi , Naoko Konishi
IPC分类号： H01L31/0232 , H01L27/144
CPC分类号： H01L27/1446 , G02B6/00 , G02B6/24 , G02B6/42 , H01L31/105 , H01L31/184
摘要： A semiconductor optical device that integrates photodiodes (PDs) and optical waveguides coupling with the PDs and a method of forming the semiconductor optical device are disclosed. The optical waveguides in a portion in the lower cladding layer thereof provides a modified layer that forms a conduction barrier of the lower cladding layer. The modified layer is formed by converting the conduction type thereof or implanting protons therein. The modified layer prevents the electrical coupling between PDs through the waveguides.
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公开(公告)号：US09638980B2
公开(公告)日：2017-05-02
申请号：US14805142
申请日：2015-07-21
CPC分类号： G02F1/2255 , G02F1/025 , G02F2001/212 , G02F2201/12
摘要： A modulator including: a Mach-Zehnder modulator that includes an optical waveguide disposed on a substrate, the optical waveguide including an electrode thereon; a resin layer disposed on the substrate, the resin layer embedding the optical waveguide, the resin layer having a groove arranged besides the optical waveguide; a termination resistor disposed on the substrate in the groove of the resin layer; and a first wiring disposed on the resin layer, the first wiring being connected to the termination resistor and the electrode of the optical waveguide.
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26.发明授权Method for manufacturing semiconductor optical waveguide device, and semiconductor optical waveguide device 有权半导体光波导器件的制造方法以及半导体光波导器件公开(公告)号：US09261649B2
公开(公告)日：2016-02-16
申请号：US14657781
申请日：2015-03-13
发明人： Takamitsu Kitamura , Hideki Yagi , Naoya Kono
CPC分类号： G02B6/136 , G02B6/1228 , G02B2006/12173
摘要： A method for manufacturing a semiconductor optical waveguide device includes the steps of forming a waveguide mesa having first and second portions by etching a stacked semiconductor layer through a first mask; forming a dummy buried region embedding a top surface and side surfaces of the waveguide mesa; forming a second mask on the dummy buried region, the second mask having an opening on the first portion and having a pattern on the second portion; forming a third mask having an opening that reaches a top surface of the first portion, the third mask including a dummy buried mask formed by etching the dummy buried region through the second mask; forming an upper mesa by etching the waveguide mesa through the third mask; and after removing the third mask, forming a lower mesa by etching the stacked semiconductor layer, the lower mesa having a greater width than that of the upper mesa.
摘要翻译： 一种制造半导体光波导器件的方法包括以下步骤：通过第一掩模蚀刻堆叠的半导体层来形成具有第一和第二部分的波导台面; 形成嵌入波导台面的顶面和侧面的虚拟埋入区域; 在所述伪掩埋区域上形成第二掩模，所述第二掩模在所述第一部分上具有开口，并且在所述第二部分上具有图案; 形成具有到达所述第一部分的顶表面的开口的第三掩模，所述第三掩模包括通过所述第二掩模蚀刻所述伪掩埋区域而形成的伪掩模掩模; 通过蚀刻波导台面通过第三掩模形成上台面; 并且在去除第三掩模之后，通过蚀刻堆叠的半导体层形成下台面，下台面的宽度大于上台面的宽度。
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公开(公告)号：US11527866B2
公开(公告)日：2022-12-13
申请号：US17078753
申请日：2020-10-23
发明人： Naoki Fujiwara , Hideki Yagi , Hajime Shoji , Takuo Hiratani , Takehiko Kikuchi , Toshiyuki Nitta
摘要： A semiconductor optical device includes an SOI substrate having a waveguide of silicon, and at least one gain region of a group III-V compound semiconductor having an optical gain bonded to the SOI substrate. The waveguide has a bent portion and multiple linear portions extending linearly and connected to each other through the bent portion. The gain region is disposed on each of the multiple linear portions.
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公开(公告)号：US11270907B2
公开(公告)日：2022-03-08
申请号：US16999155
申请日：2020-08-21
IPC分类号： H01L21/762 , H01L29/15 , H01L29/267 , H01L23/373
摘要： A method for producing a semiconductor device includes a step of bonding a chip to a SOI wafer, the chip being formed of a III-V group compound semiconductor and including a substrate and a first semiconductor layer; and a step of removing the substrate and the first semiconductor layer from the chip after the step of bonding. In the producing method, the first semiconductor layer has a tensile strain, and the SOI wafer and the chip are heated to a first temperature in the step of bonding, and are cooled to a second temperature lower than the first temperature after the step of bonding.
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公开(公告)号：US10823610B2
公开(公告)日：2020-11-03
申请号：US16026476
申请日：2018-07-03
发明人： Takamitsu Kitamura , Hideki Yagi
IPC分类号： G02B6/43 , H01L31/105 , G01J1/44 , G01J1/42 , H01L31/0232 , H01L31/0304 , H01L31/109 , H01L31/18 , H01L31/0352 , G01J1/04 , G01J1/02 , G01J9/02 , G02B6/12
摘要： A method for fabricating a light receiving device includes: preparing a first substrate product which includes a semiconductor region having a common semiconductor layer, a first semiconductor laminate for a photodiode, a second semiconductor laminate for a waveguide, and a butt-joint between the first semiconductor laminate and the second semiconductor laminate, the first laminate and the second semiconductor laminate being disposed on the common semiconductor layer; etching the first substrate product with a first mask to form a second substrate product having a photodiode mesa structure produced from the first semiconductor laminate and a preliminary mesa structure produced from the second semiconductor laminate; etching the second substrate product with the first mask and a second mask, formed on the photodiode mesa structure; to produce a waveguide mesa structure from the preliminary mesa structure, and the waveguide mesa structure having a height larger than that of the preliminary mesa structure.
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公开(公告)号：US10741591B2
公开(公告)日：2020-08-11
申请号：US16283191
申请日：2019-02-22
发明人： Hideki Yagi , Naoko Konishi , Koji Ebihara , Takuya Okimoto
IPC分类号： H01L27/144 , H01L31/0352 , H01L31/0232 , H01L31/105 , H01L31/0304 , H01L31/18 , G02B6/12 , G02B6/13 , G02B6/136
摘要： A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90° optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor.
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