公开(公告)号：US07146509B2

公开(公告)日：2006-12-05

申请号：US10004527

申请日：2001-11-01

申请人： Fabrice Marinet ,  Sylvie Wuidart

发明人： Fabrice Marinet ,  Sylvie Wuidart

IPC分类号： G06F12/14

CPC分类号： G06F21/755 ,  G06F2221/2143

摘要： Before a predetermined processing sequence, the integrated circuit detects the state of at least one timer. The circuit controls the activation of the timer if it is not activated, and disables itself if the timer is activated.

公开(公告)号：US06937049B2

公开(公告)日：2005-08-30

申请号：US10766333

申请日：2004-01-28

申请人： Sylvie Wuidart ,  Claude Zahra

发明人： Sylvie Wuidart ,  Claude Zahra

IPC分类号： G01R31/28 ,  G01R31/3185 ,  G01R31/3193 ,  G01R31/26

CPC分类号： G01R31/318505 ,  G01R31/31937 ,  G11C2029/2602

摘要： A method for testing in parallel several identical integrated circuit chips with an asynchronous operation, via two physical contacts between a tester and each of the chips, including transmitting on the tester side a first test control signal for the integrated circuit chips, having the test executed in desynchronized fashion by each of the integrated circuit chips, transmitting on the tester side, after a predetermined time interval following the transmission of the first control signal, a second result request control signal to the integrated circuit chips, and having all chips respond synchronously upon reception of said second control signal.

摘要翻译： 一种用于通过测试器和每个芯片之间的两个物理接触并联测试几个相同的集成电路芯片的方法，包括在测试器侧上传输用于集成电路芯片的第一测试控制信号，其具有执行的测试 通过每个集成电路芯片以同步的方式，在测试器侧之后，在发送第一控制信号之后的预定时间间隔之后，向集成电路芯片发送第二结果请求控制信号，并且具有所有芯片同步地响应 接收所述第二控制信号。

公开(公告)号：US06925569B2

公开(公告)日：2005-08-02

申请号：US09885450

申请日：2001-06-20

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G06F9/46 ,  G06F12/14 ,  G06F21/24 ,  G06F11/00 ,  G06F9/00 ,  G06F12/00

CPC分类号： G06F12/1441 ,  G06F12/1483

摘要： A secured microprocessor includes a rights allocation system for the allocation, to programs executable by the microprocessor, of permanent access rights to certain zones of the memory array of the microprocessor. The rights allocation system confers, on a sub-program shared by at least two programs, temporary rights of access to certain memory zones. The temporary rights are allocated when the sub-program is called by one of the programs as a function of the program calling the sub-program. The rights allocation system provides libraries in a secured microprocessor without harming the integrity of the rights conferred on programs using the libraries.

摘要翻译： 安全微处理器包括用于分配的权限分配系统，可由微处理器执行的程序，对微处理器的存储器阵列的特定区域的永久访问权限。 权利分配制度赋予由至少两个方案共享的子方案获得某些内存区域的临时访问权限。 当子程序被其中一个程序调用作为调用子程序的程序的函数时，临时权限被分配。 权利分配系统在安全的微处理器中提供库，而不会损害使用库的程序授予的权利的完整性。

公开(公告)号：US5948102A

公开(公告)日：1999-09-07

申请号：US574231

申请日：1995-12-18

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G06F12/14 ,  G06F15/78 ,  G06F21/06 ,  G06K19/073 ,  G07F7/10 ,  G06F11/00

CPC分类号： G07F7/1008 ,  G06Q20/341 ,  G07F7/082

摘要： Disclosed is a method and apparatus to increase the security of an integrated circuit, the integrated circuit including at least one microprocessor, one or more security sensors to detect abnormal conditions of operation, and registers accessible by the microprocessor which store a state of a respective sensor. The microprocessor reads the contents of a register only at the end of a random period where the duration of the random period is determined by a number generated by a random number generator.

摘要翻译： 公开了一种增加集成电路安全性的方法和装置，该集成电路包括至少一个微处理器，一个或多个安全传感器，用于检测异常操作条件，以及可由微处理器访问的寄存器，存储相应传感器的状态 。 微处理器仅在随机周期结束时读取寄存器的内容，其中随机周期的持续时间由随机数生成器产生的数字确定。

公开(公告)号：US5912859A

公开(公告)日：1999-06-15

申请号：US49644

申请日：1998-03-27

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G11C19/00 ,  G11C19/28 ,  G11C8/00

CPC分类号： G11C19/00 ,  G11C19/28

摘要： A method for the resetting of a group of series-connected non-transparent synchronous memory cells. The method includes modifying the clock signals that control the transfer gates of these cells on the activation of a resetting signal to set all the transfer gates in the on state. The method is particularly suited to the resetting of long shift registers such as those used in cryptographic applications, especially in micro-circuit cards, and the reset circuitry can be implemented using conventional logic gates.

摘要翻译： 一种用于重置一组串联非透明同步存储单元的方法。 该方法包括修改在复位信号的激活时控制这些单元的传输门的时钟信号，以将所有传输门设置为导通状态。 该方法特别适用于诸如在密码应用中使用的长移位寄存器的复位，特别是在微电路卡中，并且复位电路可以使用常规的逻辑门来实现。

公开(公告)号：US08296576B2

公开(公告)日：2012-10-23

申请号：US10388324

申请日：2003-03-12

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G06F11/30 ,  G06F12/14 ,  G06F1/26 ,  G06F11/00 ,  G08B13/00 ,  G08B21/00 ,  G08B29/00

CPC分类号： H04K3/41 ,  G06F21/755 ,  G06K19/07363 ,  H01L23/585 ,  H01L24/06 ,  H01L2924/12035 ,  H01L2924/13091 ,  H01L2924/14 ,  H04K3/60 ,  H04K3/825 ,  H04K2203/20 ,  H01L2924/00

摘要： A method for scrambling current consumption of an integrated circuit, at least during execution of a confidential operation by the integrated circuit that includes reading confidential data stored therein and/or the calculation of an encryption code is provided. The charge pump is activated to generate current consumption fluctuations on the electrical power supply line of the integrated circuit, at an intensity great enough to mask the current consumption variations associated with the execution of the confidential operation.

摘要翻译： 提供一种用于加扰集成电路的电流消耗的方法，至少在由包括读取存储在其中的机密数据和/或加密代码的计算的集成电路执行机密操作期间。 电荷泵被激活以在集成电路的电源线上产生电流消耗波动，强度足以掩盖与执行机密操作相关联的当前消耗变化。

公开(公告)号：US20100135087A1

公开(公告)日：2010-06-03

申请号：US12699134

申请日：2010-02-03

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G11C7/06

CPC分类号： G11C7/06 ,  G11C2207/066

摘要： A method for reading of the state of a non-volatile memory element including conditioning the frequency of a first oscillator to the state of this element, and comparing the frequency of the first oscillator with the predetermined frequency of a second oscillator, selected between two possible frequency values for the first oscillator, according to the state of the storage element.

摘要翻译： 一种用于读取非易失性存储元件的状态的方法，包括将第一振荡器的频率调节到该元件的状态，并将第一振荡器的频率与第二振荡器的预定频率进行比较，所述第二振荡器的频率在两个可能的 根据存储元件的状态，第一振荡器的频率值。

公开(公告)号：US07388802B2

公开(公告)日：2008-06-17

申请号：US11423852

申请日：2006-06-13

申请人： Sylvie Wuidart ,  Mathieu Lisart ,  Nicolas Demange

发明人： Sylvie Wuidart ,  Mathieu Lisart ,  Nicolas Demange

IPC分类号： G11C8/00 ,  G11C5/06 ,  G11C7/00 ,  G11C8/02 ,  G06F12/00

CPC分类号： G11C8/20 ,  G11C7/24 ,  G11C16/22

摘要： A memory comprises memory cells arranged in a memory array, and an address decoder to apply memory cells selection signals to the memory array according to a read address applied to the memory. The memory comprises an address reconstruction circuit which reconstructs at least one part of the read address from the memory cells selection signals, and supplies a first reconstructed address able to detect an error injection affecting the selection signals. Particularly but not exclusively applicable to the integrated circuits for chip cards.

摘要翻译： 存储器包括布置在存储器阵列中的存储单元，以及地址解码器，用于根据应用于存储器的读取地址将存储单元选择信号应用于存储器阵列。 存储器包括地址重构电路，其从存储器单元选择信号重建读取地址的至少一部分，并且提供能够检测影响选择信号的错误注入的第一重建地址。 特别但不排他地适用于芯片卡的集成电路。

公开(公告)号：US20080046693A1

公开(公告)日：2008-02-21

申请号：US11701954

申请日：2007-02-02

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G06F9/30 ,  G06F11/00

CPC分类号： G06F21/72 ,  G06F21/10 ,  G06F21/71

摘要： A digital processing unit for executing program instructions stored in at least two memories and including at least one first register of temporary storage of the operator of a current instruction to be executed and at least a second register of temporary storage of at least one argument or operand of said current instruction, and a protection circuit for submitting, upstream of the register, the operator to a deciphering function if this operator originates from one of the memories or from an area of these memories, identified from the address provided by a program counter. The present invention also relates to a method for protecting a program for updating an electronic circuit and controlling its execution, including at least one step of ciphering or deciphering of program instruction operators.

摘要翻译： 一种数字处理单元，用于执行存储在至少两个存储器中的程序指令，并且包括要执行的当前指令的操作者的临时存储器的至少一个第一寄存器和至少一个参数或操作数的临时存储器的至少第二寄存器 以及保护电路，用于在操作者的上游向用户提交解密功能，如果该操作者来自存储器中的一个或从由程序计数器提供的地址识别的这些存储器的区域。 本发明还涉及一种用于保护用于更新电子电路并控制其执行的程序的方法，包括对程序指令操作符进行加密或解密的至少一个步骤。

公开(公告)号：US07178067B2

公开(公告)日：2007-02-13

申请号：US10317005

申请日：2002-12-11

申请人： Sylvie Wuidart

发明人： Sylvie Wuidart

IPC分类号： G06F11/00

CPC分类号： G06F11/1008 ,  G06F11/08 ,  G11C16/22

摘要： An electrically erasable and programmable memory includes at least one non-erasable secured zone. Detection and/or correction of read errors in the secured zone is provided by recording redundant bits in the secured zone and delivering an error signal and/or a bit having the majority value when the redundant bits read in the secured zone are not equal.

摘要翻译： 电可擦除和可编程的存储器包括至少一个不可擦除的安全区域。 在安全区域中读取错误的检测和/或校正是通过在安全区域中记录冗余位并且当在安全区域中读取的冗余位不相等时传送误差信号和/或具有多数值的位来提供的。