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    TAMPER DETECTION
    21.
    发明申请
    TAMPER DETECTION 审中-公开
    夯锤检测

    公开(公告)号：US20170017943A1

    公开(公告)日：2017-01-19

    申请号：US14799341

    申请日：2015-07-14

    Applicant: Texas Instruments Incorporated

    Inventor： Erkan Bilhan ,  Rajitha Padakanti ,  Amritpal Singh Mundra

    IPC: G06Q20/20 ,  G08B13/06

    CPC classification number: G06Q20/206 ,  G07F19/2055

    Abstract: A financial transaction system includes sensors, a tamper detection module, and circuitry configurable to control which sensors are used, and the circuitry is configurable after the tamper detection module has been manufactured.

    Abstract translation: 金融交易系统包括传感器，篡改检测模块和可配置为控制使用哪些传感器的电路，并且在制造篡改检测模块之后可配置电路。

    HARDWARE COUNTERMEASURES IN A FAULT TOLERANT SECURITY ARCHITECTURE
    23.
    发明申请
    HARDWARE COUNTERMEASURES IN A FAULT TOLERANT SECURITY ARCHITECTURE 有权

    公开(公告)号：US20240370591A1

    公开(公告)日：2024-11-07

    申请号：US18772617

    申请日：2024-07-15

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Amritpal Singh Mundra

    IPC: G06F21/75 ,  G06F21/85 ,  H03K17/22 ,  H04L9/00

    Abstract: A system, e.g., system-on-chip (SoC), is provided that includes security control registers that include security flags for security critical assets of the SoC, in which each security flag includes multiple bits. In an example, a system includes a processor; a set of devices including a first device that includes a set of registers; and a set of firewalls, each configured to couple the processor to a respective device of the set of devices. The set of registers stores a first value determined by a plurality of bits, and the first device determines whether to cause a first firewall of the set of firewalls to operate in a bypass mode based on a relationship between values of adjacent bits of the first value.

    System on chip firewall memory architecture
    24.
    发明授权
    System on chip firewall memory architecture 有权

    公开(公告)号：US12101293B2

    公开(公告)日：2024-09-24

    申请号：US17392497

    申请日：2021-08-03

    Applicant: Texas Instruments Incorporated

    Inventor： Amritpal Singh Mundra ,  Chunhua Hu

    IPC: H04L29/06 ,  G06F21/71 ,  G06F21/76 ,  G06F21/85 ,  H04L9/40

    CPC classification number: H04L63/0218 ,  G06F21/71 ,  G06F21/76 ,  G06F21/85 ,  H04L63/0227

    Abstract: In described examples, a system on a chip (SoC) and method for sending messages in the SoC include determining locations of initiator-side firewall block and receiver-side firewall block memories using respective pointers to the firewall block memories stored in a single, contiguous memory. Addresses of the pointers within the single memory depend on respective unique firewall identifiers of the firewall blocks. An exclusive security configuration controller uses the pointers to configure the firewall blocks over a security bus which is electrically isolated from a system bus. The system bus is used to send messages from sending functional blocks to receiving functional blocks. The initiator-side firewall block adds a message identifier to messages. The message identifier depends on the initiator-side firewall block's configuration settings. The receiver-side firewall block controls permission for the receiving functional block to access the message, depending on the message identifier and the receiver-side firewall block's configuration settings.

    SYSTEM ON CHIP FIREWALL MEMORY ARCHITECTURE
    27.
    发明申请
    SYSTEM ON CHIP FIREWALL MEMORY ARCHITECTURE 有权

    公开(公告)号：US20210367922A1

    公开(公告)日：2021-11-25

    申请号：US17392497

    申请日：2021-08-03

    Applicant: Texas Instruments Incorporated

    Inventor： Amritpal Singh Mundra ,  Chunhua Hu

    IPC: H04L29/06

    Abstract: In described examples, a system on a chip (SoC) and method for sending messages in the SoC include determining locations of initiator-side firewall block and receiver-side firewall block memories using respective pointers to the firewall block memories stored in a single, contiguous memory. Addresses of the pointers within the single memory depend on respective unique firewall identifiers of the firewall blocks. An exclusive security configuration controller uses the pointers to configure the firewall blocks over a security bus which is electrically isolated from a system bus. The system bus is used to send messages from sending functional blocks to receiving functional blocks. The initiator-side firewall block adds a message identifier to messages. The message identifier depends on the initiator-side firewall block's configuration settings. The receiver-side firewall block controls permission for the receiving functional block to access the message, depending on the message identifier and the receiver-side firewall block's configuration settings.

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