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    Testing semiconductor components
    21.
    发明授权
    Testing semiconductor components 有权

    公开(公告)号：US11201065B2

    公开(公告)日：2021-12-14

    申请号：US16791152

    申请日：2020-02-14

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Enis Tuncer ,  Byron Harry Gibbs

    IPC: H01L21/56 ,  H01L21/687

    Abstract: A method of manufacturing a semiconductor package includes covering a semiconductor die and a plurality of conductive terminals coupled to the semiconductor die in a mold compound, positioning the mold compound between a first pair of electrodes and a second pair of electrodes, and moving a movable electrode of the first pair and a movable electrode of the second pair into a first clamping position. In the first clamping position, each of the first pair of electrodes and the second pair of electrodes electrically couples to a unique subset of the plurality of conductive terminals. The method also includes applying, by the first pair of electrodes, a first voltage to the semiconductor die within the mold compound; and applying, by the second pair of electrodes, a second voltage to the semiconductor die within the mold compound. The second voltage is less than the first voltage.

    Isolated component design
    22.
    发明授权
    Isolated component design 有权

    公开(公告)号：US10770378B1

    公开(公告)日：2020-09-08

    申请号：US16401828

    申请日：2019-05-02

    Applicant: Texas Instruments Incorporated

    Inventor： Enis Tuncer

    IPC: H01L23/495

    Abstract: A microelectronic device includes a first conductor and a second conductor, separated by a lateral spacing. The first conductor has a low field contour facing the second conductor. The low field contour has offsets from a tangent line to the first conductor on the low field contour. Each of the offsets increases a separation of the high voltage conductor from the low voltage conductor. A first offset, located from an end of the high voltage conductor, at a first lateral distance of 25 percent of the minimum separation, is 19 percent to 28 percent of the minimum separation. A second offset, located at a second lateral distance of 50 percent of the minimum separation, is 9 percent to 14 percent of the minimum separation. A third offset, located at a third lateral distance of 75 percent of the minimum separation, is 4 percent to 6 percent of the minimum separation.

    Acoustic Device Package And Method Of Making
    23.
    发明申请
    Acoustic Device Package And Method Of Making 审中-公开

    公开(公告)号：US20190214964A1

    公开(公告)日：2019-07-11

    申请号：US16356890

    申请日：2019-03-18

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Enis Tuncer ,  Abram Castro

    IPC: H03H9/10

    CPC classification number: H03H9/1042 ,  H03H9/1007

    Abstract: An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

    STRUCTURES AND METHODS FOR CAPACITIVE ISOLATION DEVICES
    24.
    发明申请
    STRUCTURES AND METHODS FOR CAPACITIVE ISOLATION DEVICES 审中-公开

    公开(公告)号：US20190019776A1

    公开(公告)日：2019-01-17

    申请号：US15646976

    申请日：2017-07-11

    Applicant: Texas Instruments Incorporated

    Inventor： Enis Tuncer ,  Minhong Mi ,  Swaminathan Sankaran ,  Rajen M. Murugan ,  Vikas Gupta

    IPC: H01L25/065 ,  H01L23/31 ,  H01L49/02 ,  H01L23/495 ,  H01L23/00

    Abstract: Described examples include a packaged device including a first object and a second object spaced from each other by a gap, each object having a first surface and an opposite second surface, the first surfaces of the first object and the second object including first terminals. A structure includes at least two conductors embedded in a dielectric casing consolidating a configuration and organization of the at least two conductors, the at least two conductors having end portions un-embedded by the dielectric casing. An end portion of at least one of the at least two conductors is electrically connected to a first terminal of the first object, and an opposite end portion of the at least one of the at least two conductors is electrically connected to a respective first terminal of the second object, the at least two conductors electrically connecting the first object and the second object.

    ACOUSTIC DEVICE PACKAGE AND METHOD OF MAKING
    25.
    发明申请
    ACOUSTIC DEVICE PACKAGE AND METHOD OF MAKING 审中-公开
    声学设备包装及其制作方法

    公开(公告)号：US20160322557A1

    公开(公告)日：2016-11-03

    申请号：US14698616

    申请日：2015-04-28

    Applicant: Texas Instruments Incorporated

    Inventor： Enis Tuncer ,  Abram Castro

    IPC: H01L41/08 ,  H03H3/007

    CPC classification number: H03H9/1042 ,  H03H9/1007

    Abstract: An assembly including an electrical connection substrate formed of material having a Young's modulus of less than about 10 MPa, an acoustic device die having opposite end portions mounted on and electrically connected to the electrical connection substrate and a mold compound layer encapsulating the acoustic device die and interfacing with the substrate.

    Abstract translation: 一种组件，包括由杨氏模量小于约10MPa的材料形成的电连接衬底，具有安装在电连接衬底上并与其电连接的相对端部的声学器件模具和封装声学器件裸片的模制化合物层 与基底接触。

    Semiconductor fuse with multi-bond wire
    26.
    发明授权
    Semiconductor fuse with multi-bond wire 有权

    公开(公告)号：US12191252B2

    公开(公告)日：2025-01-07

    申请号：US17546383

    申请日：2021-12-09

    Applicant: Texas Instruments Incorporated

    Inventor： Enis Tuncer

    IPC: H01L23/525 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31

    Abstract: An electronic device has a fuse circuit including a semiconductor die and first and second bond wires, the semiconductor die having a bond pad and a fuse, the fuse having first and second portions, the bond pad coupled to the first portion of the fuse, and the second portion of the fuse coupled to a protected circuit, the first bond wire having a first end coupled to the bond pad and a second end coupled to a conductive terminal, and the second bond wire having a first end coupled to the second end of the first bond wire and a second end coupled to the conductive terminal.

    Isolated temperature sensor package with embedded spacer in dielectric opening
    30.
    发明授权
    Isolated temperature sensor package with embedded spacer in dielectric opening 有权

    公开(公告)号：US11879790B2

    公开(公告)日：2024-01-23

    申请号：US17513259

    申请日：2021-10-28

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Enis Tuncer

    IPC: H01L23/00 ,  G01K7/01 ,  H01L23/28 ,  H01L23/48 ,  H01L23/485

    CPC classification number: G01K7/01 ,  H01L23/28 ,  H01L23/48 ,  H01L23/485 ,  H01L24/46 ,  H01L2224/48091 ,  H01L2224/73265

    Abstract: An electronic device includes a substrate, a dielectric spacer, a semiconductor die, and a package structure. The substrate has a dielectric layer, a die pad, first and second leads, a conductive via, and a conductive trace, the dielectric layer has an opening extending into a side, the die pad is coupled to the first lead, the second lead is coupled to the conductive via, and the conductive trace is coupled to the via. The dielectric spacer is mounted above the die pad in the opening, and the semiconductor die is mounted above the dielectric spacer, the semiconductor die includes a temperature sensor, and an electrical connection couples the semiconductor die to the conductive trace. The package structure extends on the side of the dielectric layer, on the semiconductor die, and on the conductive trace, the package structure extending around the dielectric spacer and to the die pad in the opening.

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