公开(公告)号：US06727111B2

公开(公告)日：2004-04-27

申请号：US10170012

申请日：2002-06-11

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01L2100

CPC classification number: H01C17/281 ,  H01C7/003 ,  H01C17/006 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2203/0228 ,  Y10T29/49082 ,  Y10T29/49098 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: A multi-element electronic chip device is manufactured which has a plurality of elements such as film resistors 2 or the like on one insulating substrate 1 by carrying out a step of performing primary division of a ceramic material plate A corresponding to a multiplicity of insulating substrates 1 into ceramic bars A′ each corresponding to a row of plural insulating substrates 1, a step of forming grooves 6 in lengthwise side faces of each ceramic bar A′ before forming side electrodes 5 for both ends of each film resistor 2 or forming grooves 6 after forming side electrodes 5, and a step of performing secondary division of the ceramic bar A′ into individual insulating substrates 1. This structure is a low cost solution for preventing the side electrodes 5 for different film resistors 2 from connecting with each other.

Abstract translation: 通过进行对应于多个绝缘基板的陶瓷材料板A的一次分割的步骤，制造了在一个绝缘基板1上具有多个元件如薄膜电阻器2等的多元件电子芯片装置 1形成各自对应于一排多个绝缘基板1的陶瓷棒A'，在形成每个薄膜电阻器2的两端的侧电极5或成形槽6之前，在每个陶瓷棒A'的纵向侧面上形成凹槽6的步骤 在形成侧电极5之后，以及将陶瓷棒A'二次分割成单独的绝缘基板1的步骤。这种结构是用于防止不同薄膜电阻器2的侧电极5彼此连接的低成本解决方案。

公开(公告)号：US07380333B2

公开(公告)日：2008-06-03

申请号：US10121715

申请日：2002-04-15

Applicant: Torayuki Tsukada ,  Takahiro Kuriyama

Inventor： Torayuki Tsukada ,  Takahiro Kuriyama

IPC: H01C17/00

CPC classification number: H01C17/006 ,  Y10T29/49082 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49798

Abstract: A method of making a chip resistor is provided. The method includes the following steps. First, a resistive element is provided on a substrate. Then, a resin layer is formed on the substrate to enclose the resistive element. Then, the substrate and the resin layer are cut in this order. To prevent the breakage of the substrate during the cutting, the resin layer has better machinability than the substrate.

Abstract translation: 提供制造片式电阻器的方法。 该方法包括以下步骤。 首先，在基板上设置电阻元件。 然后，在基板上形成树脂层以包围电阻元件。 然后，依次切割基板和树脂层。 为了防止切割时的基板破损，树脂层比基板具有更好的机械加工性。

公开(公告)号：US07342480B2

公开(公告)日：2008-03-11

申请号：US10517943

申请日：2003-06-12

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C17/28 ,  H01C7/06 ,  H01C17/006

Abstract: A chip resistor includes a resistor element of a rectangular solid made of an alloy composed of high-resistant metal and low-resistant metal. The resistor has connection terminal electrodes disposed at the ends of the resistor element that are spaced longitudinally of the rectangular solid. The resistance of the chip resistor is lowered without incurring an increase in the temperature coefficient of resistance and the weight. A plating layer is formed on the resistor element, where the plating element is made of pure metal having a lower resistance that that of the alloy constituting the resistor element.

Abstract translation: 芯片电阻器包括由耐高温金属和低电阻金属组成的合金制成的矩形固体的电阻元件。 电阻器具有设置在电阻器元件端部处的连接端子电极，其在矩形立体体的纵向间隔开。 芯片电阻器的电阻降低，而不会导致电阻温度系数和重量的增加。 在电阻元件上形成电镀层，其中电镀元件由构成电阻元件的合金的电阻较低的纯金属制成。

公开(公告)号：US07221254B2

公开(公告)日：2007-05-22

申请号：US10518224

申请日：2003-06-12

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C7/003 ,  H01C1/142 ,  H01C17/006 ,  H01C17/281 ,  Y10T29/49082

Abstract: A resistor, including a resistive element made of a metal plate, has a low resistance resulting from connection terminal electrodes formed on both ends of the lower surface of the resistive element. The object thereof is to achieve weight reduction and lower costs by reducing the height of the resistor. To achieve the above object, the ends of the lower surface of the resistive element are provided with recesses for accommodating the connection terminal electrodes, while at least the intermediate area of the lower surface of the resistive element between the connection terminal electrodes is covered with an insulator. Alternatively, a recess may be formed in the middle of the lower surface of the resistive element for using the ends of the lower surface as a pair of connection terminal electrodes, the recess being internally covered with an insulator.

Abstract translation: 包括由金属板制成的电阻元件的电阻器具有由形成在电阻元件的下表面的两端上的连接端子电极产生的低电阻。 其目的是通过降低电阻器的高度来实现重量减轻和降低成本。 为了实现上述目的，电阻元件的下表面的端部设置有用于容纳连接端子电极的凹部，而至少在连接端子电极之间的电阻元件的下表面的中间区域被覆盖有 绝缘子。 或者，可以在电阻元件的下表面的中间形成凹部，以将下表面的端部用作一对连接端子电极，该凹部内部被绝缘体覆盖。

公开(公告)号：US07193499B2

公开(公告)日：2007-03-20

申请号：US10833940

申请日：2004-04-27

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C1/144 ,  H01C7/003 ,  H01C17/006 ,  H05K3/3442

Abstract: A chip resistor includes a resistor element in the form of a chip, and at least two electrodes formed on the resistor element. The resistor element includes an upper surface, a lower surface, and two end surfaces extending between the upper and the lower surfaces and spaced from each other. The two electrodes are provided on the lower surface of the resistor element. Each of the end surfaces of the resistor element is formed with a conductor film integrally connected to a corresponding one of the electrodes. The conductor film is made of copper, for example, and is higher in solder-wettability than the resistor element.

Abstract translation: 芯片电阻器包括芯片形式的电阻元件和形成在电阻元件上的至少两个电极。 电阻器元件包括上表面，下表面和在上表面和下表面之间延伸并且彼此间隔开的两个端表面。 两个电极设置在电阻元件的下表面上。 电阻元件的每个端面形成有与相应的一个电极整体连接的导体膜。 导体膜例如由铜制成，并且焊料润湿性高于电阻元件。

公开(公告)号：US07129814B2

公开(公告)日：2006-10-31

申请号：US10833939

申请日：2004-04-27

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/012

CPC classification number: H01C17/281 ,  H01C1/148 ,  H01C17/006 ,  Y10T29/49082

Abstract: A chip resistor includes a metal resistor element having a flat lower surface. The lower surface is formed with two electrodes spaced from each other, and an insulating resin film is formed between these electrodes. Each of the electrodes partially overlaps the insulating film so that a portion of the insulating film is inserted between each of the electrodes and the lower surface of the resistor element.

Abstract translation: 芯片电阻器包括具有平坦的下表面的金属电阻器元件。 下表面形成有彼此间隔开的两个电极，并且在这些电极之间形成绝缘树脂膜。 每个电极部分地与绝缘膜重叠，使得绝缘膜的一部分插入每个电极和电阻元件的下表面之间。

公开(公告)号：US20050266615A1

公开(公告)日：2005-12-01

申请号：US10521908

申请日：2003-07-22

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C17/02 ,  H01C1/144 ,  H01C7/00 ,  H01C17/00 ,  H01C17/28 ,  H05K3/34 ,  H01L21/44

CPC classification number: H01C7/003 ,  H01C1/144 ,  H01C17/006 ,  H01C17/281 ,  H05K3/3442 ,  Y10T29/49099

Abstract: A chip resistor includes a resistive element (1), an insulation layer (4) formed in a back surface of the flat surface, and two electrodes (3) spaced from each other via the insulation layer. Each electrode (3) makes contact with the insulation layer (4). Each electrode (3) has a lower surface formed with a solder layer (39).

Abstract translation: 芯片电阻器包括电阻元件（1），形成在平坦表面的后表面中的绝缘层（4）和经由绝缘层彼此间隔开的两个电极（3）。 每个电极（3）与绝缘层（4）接触。 每个电极（3）具有形成有焊料层（39）的下表面。

公开(公告)号：US08111130B2

公开(公告)日：2012-02-07

申请号：US12465226

申请日：2009-05-13

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C1/142

CPC classification number: H01C1/012 ,  H01C13/02 ,  H01C17/006

Abstract: A chip resistor includes a resistor element, a reinforcing member, and a pair of electrodes. The resistor element includes a first surface and a second surface opposite to the first surface. The reinforcing member is bonded to the first surface of the resistor element. The pair of electrodes are formed on the second surface of the resistor element. The resistor element is formed with a slit located between the pair of electrodes.

Abstract translation: 芯片电阻器包括电阻元件，加强元件和一对电极。 电阻元件包括第一表面和与第一表面相对的第二表面。 加强构件结合到电阻元件的第一表面。 一对电极形成在电阻元件的第二表面上。 电阻元件形成有位于该对电极之间的狭缝。

公开(公告)号：US07755468B2

公开(公告)日：2010-07-13

申请号：US12002751

申请日：2007-12-18

Applicant: Torayuki Tsukada

Inventor： Torayuki Tsukada

IPC: H01C10/00

CPC classification number: H01C7/003 ,  H01C1/144 ,  H01C17/006 ,  H01C17/281 ,  H05K3/3442 ,  Y10T29/49099

Abstract: A chip resistor includes a resistive element (1), an insulation layer (4) formed in a back surface of the flat surface, and two electrodes (3) spaced from each other via the insulation layer. Each electrode (3) makes contact with the insulation layer (4). Each electrode (3) has a lower surface formed with a solder layer (39).

Abstract translation: 芯片电阻器包括电阻元件（1），形成在平坦表面的后表面中的绝缘层（4）和经由绝缘层彼此间隔开的两个电极（3）。 每个电极（3）与绝缘层（4）接触。 每个电极（3）具有形成有焊料层（39）的下表面。

公开(公告)号：US20100117783A1

公开(公告)日：2010-05-13

申请号：US12692827

申请日：2010-01-25

Applicant: Masanori TANIMURA ,  Torayuki Tsukada ,  Kousaku Tanaka

Inventor： Masanori TANIMURA ,  Torayuki Tsukada ,  Kousaku Tanaka

IPC: H01C7/18 ,  H01L21/02 ,  H01L21/78

CPC classification number: H01C17/281 ,  H01C1/148 ,  H01C7/003 ,  H01C17/006 ,  Y10T29/49099

Abstract: A chip resistor (A1) includes a chip-like resistor element (1), two electrodes (31) spaced from each other on the bottom surface (1a) of the resistor element, and an insulation film (21) between the two electrodes. Each electrode (31) has an overlapping portion (31c) which overlaps the insulation film (21) as viewed in the vertical direction.

Abstract translation: 片状电阻器（A1）包括片状电阻元件（1），在电阻元件的底面上彼此间隔开的两个电极（31）和两个电极之间的绝缘膜（21）。 每个电极（31）具有在垂直方向上观察时与绝缘膜（21）重叠的重叠部分（31c）。