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    Semiconductor structure and method for forming the same
    21.
    发明授权
    Semiconductor structure and method for forming the same 有权

    公开(公告)号：US11322682B2

    公开(公告)日：2022-05-03

    申请号：US17152703

    申请日：2021-01-19

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Hui-Lin Wang ,  Chia-Chang Hsu ,  Rai-Min Huang

    IPC: H01L43/12 ,  H01L23/544 ,  H01L43/02 ,  H01L27/22

    Abstract: A semiconductor structure is provided in the present invention, including a substrate having a device region and an alignment mark region defined thereon, a dielectric layer disposed on the substrate, a conductive via formed in the dielectric layer on the device region, a first trench formed in the dielectric layer on the alignment mark, a plurality of second trenches formed in the dielectric layer directly under the first trench and exposed from a bottom surface of the first trench, and a memory stacked structure disposed on the dielectric layer, directly covering a top surface of the conductive via and filling into the first trench and the second trench.

    MRAM STRUCTURE
    24.
    发明申请
    MRAM STRUCTURE 有权

    公开(公告)号：US20210225414A1

    公开(公告)日：2021-07-22

    申请号：US17224153

    申请日：2021-04-07

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Po-Kai Hsu ,  Hung-Yueh Chen ,  Kun-I Chou ,  Jing-Yin Jhang ,  Hui-Lin Wang ,  Yu-Ping Wang

    IPC: G11C5/06 ,  H01L27/24 ,  H01L27/22

    Abstract: A MRAM structure, which is provided with multiple source lines between active areas, each source line has multiple branches electrically connecting with the active areas at opposite sides in alternating arrangement. Multiple word lines traverse through the active areas to form transistors. Multiple storage units are disposed between the word lines on the active areas in staggered array arrangement, and multiple bit lines electrically connect with storage units on corresponding active areas, wherein each storage cell includes one of the storage unit, two of the transistors respectively at both sides of the storage unit, and two branches of the source line.

    Manufacturing method of semiconductor device
    25.
    发明授权
    Manufacturing method of semiconductor device 有权

    公开(公告)号：US10991878B2

    公开(公告)日：2021-04-27

    申请号：US16885233

    申请日：2020-05-27

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chen-Yi Weng ,  Jing-Yin Jhang ,  Hui-Lin Wang ,  Chin-Yang Hsieh

    IPC: H01L43/12 ,  H01L43/10 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first inter-metal dielectric (IMD) layer is formed on a substrate. A cap layer is formed on the first IMD layer. A connection structure is formed on the substrate and penetrates the cap layer and the first IMD layer. A magnetic tunnel junction (MTJ) stack is formed on the connection structure and the cap layer. A patterning process is performed to the MTJ stack for forming a MTJ structure on the connection structure and removing the cap layer. A second IMD layer is formed on the first IMD layer and surrounds the MTJ structure. The semiconductor device includes the substrate, the connection structure, the first IMD layer, the MTJ structure, and the second IMD layer. The dielectric constant of the first IMD layer is lower than the dielectric constant of the second IMD layer.

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