公开(公告)号：US20050016467A1

公开(公告)日：2005-01-27

申请号：US10626998

申请日：2003-07-24

申请人： Yi-Li Hsiao ,  Mei-Sheng Zhou ,  Chin-Hsin Peng ,  Chien-Ling Huang ,  Tse-Yi Chen ,  Chun-Yi Lee ,  Hsueh-Chang Wu

发明人： Yi-Li Hsiao ,  Mei-Sheng Zhou ,  Chin-Hsin Peng ,  Chien-Ling Huang ,  Tse-Yi Chen ,  Chun-Yi Lee ,  Hsueh-Chang Wu

IPC分类号： C23C16/00 ,  H01L21/00

CPC分类号： H01L21/67248 ,  H01J2237/2001 ,  H01L21/67109

摘要： A system and method which is capable of compensating for unintended elevations in process temperatures induced in a substrate during a semiconductor fabrication process in order to reduce or eliminate disparities in critical dimensions of device features. The system may be a plasma etching system comprising a process chamber containing an electrostatic chuck (ESC) for supporting a wafer substrate. A chiller outside the process chamber includes a main coolant chamber, which contains a main coolant fluid, as well as an compensation coolant chamber, which contains an compensation coolant fluid. A main circulation loop normally circulates the main coolant fluid from the main coolant chamber through the electrostatic chuck to maintain the chuck at a desired set point temperature.

摘要翻译： 一种系统和方法，其能够在半导体制造过程期间补偿在衬底中感应的工艺温度中的意外高度，以便减少或消除器件特征的关键尺寸的不均匀性。 该系统可以是包括含有用于支撑晶片衬底的静电吸盘（ESC）的处理室的等离子体蚀刻系统。 处理室外部的冷却器包括主冷却剂室，其包含主冷却剂流体，以及补偿冷却剂室，其包含补偿冷却剂流体。 主循环回路通常使主冷却剂流体从主冷却剂室通过静电吸盘循环，以将卡盘保持在所需的设定点温度。

公开(公告)号：US20130277750A1

公开(公告)日：2013-10-24

申请号：US13451261

申请日：2012-04-19

申请人： Jui-Yao Lai ,  Chun-Yi Lee ,  Shyh-Wei Wang ,  Yen-Ming Chen

发明人： Jui-Yao Lai ,  Chun-Yi Lee ,  Shyh-Wei Wang ,  Yen-Ming Chen

IPC分类号： H01L27/06 ,  H01L27/08

CPC分类号： H01L28/24 ,  H01L21/823842 ,  H01L23/5228 ,  H01L27/0629 ,  H01L27/0802 ,  H01L28/20 ,  H01L29/0649 ,  H01L29/0847 ,  H01L2924/0002 ,  H01L2924/00

摘要： A system and method for forming a resistor system is provided. An embodiment comprises a resistor formed in a U-shape. The resistor may comprise multiple layers of conductive materials, with a dielectric layer filling the remainder of the U-shape. The resistor may be integrated with a dual metal gate manufacturing process or may be integrated with multiple types of resistors.

公开(公告)号：US20110297044A1

公开(公告)日：2011-12-08

申请号：US12951668

申请日：2010-11-22

申请人： Tsung-Yen TSAI ,  Chun-Yi Lee

发明人： Tsung-Yen TSAI ,  Chun-Yi Lee

IPC分类号： C04B14/00 ,  C07C211/54

CPC分类号： C04B14/206

摘要： In an embodiment, an oligoaniline exfoliating agent, as shown in Formula (I), is provided. In Formula (I), R is —H or —NH2, and n is 3 to 30. In another embodiment, exfoliated platelet-shaped clay including the oligoaniline exfoliating agent and a method for preparing the exfoliated platelet-shaped clay are provided.

摘要翻译： 在一个实施方案中，提供如式（I）所示的寡苯胺去角质剂。 在式（I）中，R为-H或-NH 2，n为3至30.在另一个实施方案中，提供了包含低聚苯胺去角质剂的剥离片状粘土和制备剥离的片状粘土的方法。

公开(公告)号：US08041912B2

公开(公告)日：2011-10-18

申请号：US11863254

申请日：2007-09-28

申请人： Yu-Lan Kuo ,  Chun-Yi Lee ,  Kuen-Long Chang ,  Chun-Hsiung Hung

发明人： Yu-Lan Kuo ,  Chun-Yi Lee ,  Kuen-Long Chang ,  Chun-Hsiung Hung

IPC分类号： G06F12/00

CPC分类号： G11C8/20 ,  G06F21/79 ,  G11C16/22

摘要： A memory device comprises a memory array, a status register coupled with the memory array, and a security register coupled with the memory array and the status register. The memory array contains a number of memory blocks configured to have independent access control. The status register includes at least one protection bit indicative of a write-protection status of at least one corresponding block of the memory blocks that corresponds to the protection bit. The security register includes at least one register-protection bit. The register-protection bit is programmable to a memory-protection state for preventing a state change of at least the protection bit of the status register. The register-protection bit is configured to remain in the memory-protection state until the resetting of the memory device.

摘要翻译： 存储器件包括存储器阵列，与存储器阵列耦合的状态寄存器，以及与存储器阵列和状态寄存器耦合的安全寄存器。 存储器阵列包含被配置为具有独立访问控制的多个存储器块。 状态寄存器包括至少一个保护位，指示对应于保护位的存储器块的至少一个相应块的写保护状态。 安全寄存器包括至少一个寄存器保护位。 寄存器保护位可编程为存储器保护状态，以防止至少状态寄存器的保护位的状态改变。 寄存器保护位被配置为保持存储器保护状态，直到存储器件的复位。

公开(公告)号：US08040734B2

公开(公告)日：2011-10-18

申请号：US12767418

申请日：2010-04-26

申请人： Yung-Feng Lin ,  Chun-Yi Lee

发明人： Yung-Feng Lin ,  Chun-Yi Lee

IPC分类号： G11C11/34

CPC分类号： G11C7/062 ,  G11C7/067 ,  G11C7/08 ,  G11C16/28 ,  G11C2207/063

摘要： A sense amplifying method, applied in a memory having a memory cell and a reference cell, includes: charging the memory cell and the reference cell to have a cell current and a reference current, respectively; duplicating the cell current and the reference current to respectively generate a mirrored cell current via a first current path and a mirrored reference current via a second current path and equalizing a first voltage drop generated as the mirrored cell current flows by the first current path and a second voltage drop generated as the mirrored reference current flows by the second current path; and removing the equalization of the first voltage drop and the second voltage drop and adjusting first voltage drop and the second voltage drop according to a first current flowing by the first current path and a second current flowing by the second current path.

摘要翻译： 应用于具有存储单元和参考单元的存储器中的感测放大方法包括：分别对存储单元和参考单元充电以具有单元电流和参考电流; 复制单元电流和参考电流以经由第二电流路径分别经由第一电流路径和镜像参考电流产生镜像单元电流，并且均衡由第一电流路径流动的镜像单元电流产生的第一电压降和 当第二电流路径流过镜像参考电流时产生的第二电压降; 以及去除所述第一电压降和所述第二电压降的均衡，并且根据由所述第一电流路径流动的第一电流和由所述第二电流路径流动的第二电流来调节第一电压降和所述第二电压降。

公开(公告)号：US08035417B1

公开(公告)日：2011-10-11

申请号：US12843452

申请日：2010-07-26

申请人： Chun-Hsiung Hung ,  Chun-Yi Lee

发明人： Chun-Hsiung Hung ,  Chun-Yi Lee

IPC分类号： H03K19/094

CPC分类号： H03K19/018521 ,  H03K19/018528

摘要： An output buffer circuit has a variable output drive strength, depending on a buffer enable signal. Multiple output buffer circuits have a variable combined output drive strength, depending on a set of buffer enable signals.

摘要翻译： 根据缓冲器使能信号，输出缓冲电路具有可变的输出驱动强度。 多个输出缓冲电路具有可变的组合输出驱动强度，这取决于一组缓冲器使能信号。

公开(公告)号：US20100285643A1

公开(公告)日：2010-11-11

申请号：US12791656

申请日：2010-06-01

申请人： Chun-Yi Lee ,  Harry Chuang ,  Ping-Wei Wang ,  Kong-Beng Thei

发明人： Chun-Yi Lee ,  Harry Chuang ,  Ping-Wei Wang ,  Kong-Beng Thei

IPC分类号： H01L21/8238

CPC分类号： H01L27/0883 ,  G11C11/412 ,  H01L27/092 ,  H01L27/105 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/1083 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7848 ,  Y10S438/919

摘要： A semiconductor structure comprising an SRAM/inverter cell and a method for forming the same are provided, wherein the SRAM/inverter cell has an improved write margin. The SRAM/inverter cell includes a pull-up PMOS device comprising a gate dielectric over the semiconductor substrate, a gate electrode on the gate dielectric wherein the gate electrode comprises a p-type impurity and an n-type impurity, and a stressor formed in a source/drain region. The device drive current of the pull-up PMOS device is reduced due to the counter-doping of the gate electrode.

摘要翻译： 提供了包括SRAM /反相器单元的半导体结构及其形成方法，其中SRAM /反相器单元具有改善的写入裕度。 SRAM /反相器单元包括上拉PMOS器件，其包括半导体衬底上的栅极电介质，栅极电介质上的栅电极，其中栅电极包括p型杂质和n型杂质，以及形成在 源极/漏极区域。 上拉PMOS器件的器件驱动电流由于栅电极的反掺杂而降低。

公开(公告)号：US20080005434A1

公开(公告)日：2008-01-03

申请号：US11748984

申请日：2007-05-15

申请人： Chun-Yi Lee ,  Kuen-Long Chang ,  Chun-Hsiung Hung ,  Yu-Lan Kuo

发明人： Chun-Yi Lee ,  Kuen-Long Chang ,  Chun-Hsiung Hung ,  Yu-Lan Kuo

IPC分类号： G06F13/00

CPC分类号： G06F13/4291

摘要： Various embodiments increase the speed of communication over a multi-mode bus by communicating data over multiple pins in the same direction. The bus includes multiple data communication pins communicating over the bus. The bus includes a chip select pin indicating whether communication is occurring between the integrated circuit and another integrated circuit. The bus includes a clock pin. The bus includes a mode control circuit. In one mode, two of the data communication pins communicate in opposite directions between the integrated circuit and another integrated circuit. In another mode, two of the data communication pins communicate in a same direction between the integrated circuit and another integrated circuit. In some embodiments, the bus follows a Serial Peripheral Interface standard. In various embodiments, data is communicated from the integrated circuit to another integrated circuit, or from another integrated circuit to the integrated circuit.

摘要翻译： 各种实施例通过在相同方向上在多个引脚上传送数据来增加多模总线上的通信速度。 总线包括通过总线通信的多个数据通信引脚。 总线包括芯片选择引脚，指示集成电路和另一集成电路之间是否发生通信。 总线包括一个时钟引脚。 总线包括模式控制电路。 在一种模式中，两个数据通信引脚在集成电路和另一个集成电路之间的相反方向上通信。 在另一种模式中，两个数据通信引脚在集成电路和另一个集成电路之间沿相同的方向通信。 在一些实施例中，总线遵循串行外设接口标准。 在各种实施例中，数据从集成电路传送到另一集成电路，或从另一集成电路传送到集成电路。

公开(公告)号：US09729840B2

公开(公告)日：2017-08-08

申请号：US14997568

申请日：2016-01-17

申请人： Chun-Yi Lee ,  Yong-Ling Zhang ,  Ke-Shiu Chen

发明人： Chun-Yi Lee ,  Yong-Ling Zhang ,  Ke-Shiu Chen ,  Feng-Jui Hu

IPC分类号： H04N5/64 ,  H04N9/31 ,  H04M1/02

CPC分类号： H04N9/3173 ,  H04M1/0272

摘要： A detachable projection module and an electronic device having the same integrate an optical engine and an image processing unit into an independent detachable module, where the module case is fixedly connected to a device body of the electronic device, so that projection module can receive image signals from the electronic device and convert the received image signals into projection signals to be projected onto a surface near the device body of the electronic device. Through a dedicated or generic connector interface, the detachable projection module may be removed from one electronic device and be mounted to another electronic device, giving an electronic device capability of equipping a projection module to extend the electronic device with a secondary display or empower an electronic device, which has no display at first, with display ability.

公开(公告)号：US20170026625A1

公开(公告)日：2017-01-26

申请号：US14997568

申请日：2016-01-17

申请人： Chun-Yi Lee ,  Yong-Ling Zhang ,  Ke-Shiu Chen

发明人： Chun-Yi Lee ,  Yong-Ling Zhang ,  Ke-Shiu Chen ,  Feng-Jui Hu

IPC分类号： H04N9/31

CPC分类号： H04N9/3173 ,  H04M1/0272

摘要： A detachable projection module and an electronic device having the same integrate an optical engine and an image processing unit into an independent detachable module, where the module case is fixedly connected to a device body of the electronic device, so that projection module can receive image signals from the electronic device and convert the received image signals into projection signals to be projected onto a surface near the device body of the electronic device. Through a dedicated or generic connector interface, the detachable projection module may be removed from one electronic device and be mounted to another electronic device, giving an electronic device capability of equipping a projection module to extend the electronic device with a secondary display or empower an electronic device, which has no display at first, with display ability.

摘要翻译： 一种可拆卸投影模块和具有该投影模块的电子设备将光学引擎和图像处理单元集成到独立的可拆卸模块中，其中模块壳体固定地连接到电子设备的装置主体，使得投影模块可以接收图像信号 并将所接收的图像信号转换为投射到电子设备的装置主体附近的表面上的投影信号。 通过专用的或通用的连接器接口，可拆卸的投影模块可以从一个电子设备移除并且被安装到另一个电子设备，给予电子设备能力以配备投影模块以使用辅助显示器来扩展电子设备或授权电子 设备，首先没有显示，具有显示能力。