Simulation method and apparatus for simulating image of twisted yarn
    21.
    发明申请
    Simulation method and apparatus for simulating image of twisted yarn 失效
    用于模拟加捻纱图像的模拟方法和装置

    公开(公告)号:US20060025881A1

    公开(公告)日:2006-02-02

    申请号:US10537302

    申请日:2003-12-02

    申请人: Noriyuki Suzuki

    发明人: Noriyuki Suzuki

    IPC分类号: G06G7/66

    摘要: An object of the invention is to provide a simulation method and a simulation apparatus of the image of a twisted yarn capable of forming an image close to the actuality. When the images of twisted threads (1, 2) are inputted, abstracted models (3, 4) of the twisted yarns having a constant elliptical cross-section are obtained as shown in (b). A projected image (6) of the twisted yarns as shown in (c) is obtained when the models shown in (b) are viewed from the right side and one of two abstracted models (3, 4) located on the left side is concealed. The projected image (6) of the twisted yarns is formed by copying the images of the twisted yarns (1, 2) on to parts corresponding to the abstracted models (3, 4) of respective twisted yarns.

    摘要翻译: 本发明的目的是提供能够形成接近实际的图像的加捻纱的图像的模拟方法和模拟装置。 当输入扭曲线(1,2)的图像时,如(b)所示获得具有恒定椭圆截面的加捻纱线的抽取模型(3,4)。 当从右侧观察(b)所示的模型并且位于左侧的两个抽象模型(3,4)中的一个被隐藏时,获得如(c)所示的加捻纱线的投影图像(6) 。 加捻纱线的投影图像(6)通过将加捻纱线(1,2)的图像复制到与各个加捻纱线的抽出模型(3,4)相对应的部分来形成。

    Latch and phase synchronization circuit using same
    23.
    发明申请
    Latch and phase synchronization circuit using same 有权
    锁相和相位同步电路采用相同方式

    公开(公告)号:US20050216801A1

    公开(公告)日:2005-09-29

    申请号:US10989055

    申请日:2004-11-16

    申请人: Noriyuki Suzuki

    发明人: Noriyuki Suzuki

    CPC分类号: H04L7/0338

    摘要: A latch is provided for rapidly stabilizing a latching operation. The latch comprises a first latch circuit for latching a first signal in response to a first portion of a second signal to generate a first latch signal, and a latch error compensator for compensating a latch error in the first latch signal generated by the first latch circuit to generate a compensated latch signal.

    摘要翻译: 提供了用于快速稳定闩锁操作的闩锁。 锁存器包括第一锁存电路,用于响应于第二信号的第一部分来锁存第一信号以产生第一锁存信号;以及锁存器误差补偿器,用于补偿由第一锁存电路产生的第一锁存信号中的锁存器错误 以产生经补偿的锁存信号。

    Printing apparatus and printing system
    24.
    发明授权
    Printing apparatus and printing system 失效
    印刷设备和印刷系统

    公开(公告)号:US06789865B2

    公开(公告)日:2004-09-14

    申请号:US10080675

    申请日:2002-02-25

    IPC分类号: B41J2938

    CPC分类号: G06K15/02 G06K15/1805

    摘要: This invention provides a low-cost, economical printing apparatus and printing system. For example, characteristic information of a printhead which is described, printed, adhered, or formed on a printhead or its accessory (e.g., a packaging paper box) in a format identifiable to human or an electronic device is man-machine-interactively inputted to a host or electronically inputted to the host by a barcode reader or the like. The printing apparatus discriminates whether or not a command sent from the host via an interface is a command that includes characteristic information of the printhead, and control is made to write the characteristic information of the print head into a non-volatile memory (EEPROM) in accordance with the discriminating result. The printhead is controlled in accordance with the characteristic information written into the non-volatile memory to execute a print process.

    摘要翻译: 本发明提供了一种低成本,经济的打印设备和打印系统。 例如,以人或电子设备的格式描述,打印,粘贴或形成在打印头或其附件(例如,包装纸盒)上的打印头的特征信息被人机交互地输入到 主机或通过条形码读取器等电子地输入到主机。 打印装置判断从主机经由接口发送的命令是否是包括打印头的特性信息的命令,并且进行控制以将打印头的特性信息写入到非易失性存储器(EEPROM)中 根据辨别结果。 打印头根据写入非易失性存储器的特征信息进行控制,以执行打印处理。

    Power saving in a contention and polling system communication system
    25.
    发明授权
    Power saving in a contention and polling system communication system 失效
    竞争和轮询系统通信系统中的省电

    公开(公告)号:US06346873B1

    公开(公告)日:2002-02-12

    申请号:US08775883

    申请日:1997-01-02

    IPC分类号: H04Q100

    摘要: A parent node transmits a third specific message to child nodes as a broadcast message if a first specific message indicating the start of the child node collides with another message so that normal receiving cannot be performed. Then, the parent node sequentially transmits second specific messages to each child node and then receives responses to recognize the states of the children nodes. The parent node transmits a specific message indicating a realization of a sleeping state as a broadcast message to the children nodes, followed by transmitting a specific message when data to be transmitted from the child node has been generated. The parent node cancels the sleeping state when it receives the specific message.

    摘要翻译: 如果指示子节点的开始的第一特定消息与另一消息相冲突,则父节点将第三特定消息作为广播消息发送到子节点,使得不能执行正常接收。 然后,父节点顺序地向每个子节点发送第二特定消息,然后接收响应以识别子节点的状态。 父节点向儿童节点发送指示睡眠状态的实现的特定消息作为广播消息,随后在已经生成了从子节点发送的数据时发送特定消息。 父节点在接收到特定消息时取消睡眠状态。

    Recording head and recording apparatus division block driving
    26.
    发明授权
    Recording head and recording apparatus division block driving 失效
    具有时分块驱动的记录头和记录装置

    公开(公告)号:US6027198A

    公开(公告)日:2000-02-22

    申请号:US301570

    申请日:1994-09-07

    摘要: A recording head has a plurality of recording elements which are divided into a plurality of blocks and each block is driven in a time division fashion. The recording head has a signal generation circuit for generating an output signal for selecting a drive block in response to an input signal for designating the drive block from a main body of a recording apparatus. The number of signal lines of the input signal is smaller than the number of signal lines of an output signal. One such recording head is provided for each of a plurality of colors to record a color image. Signal lines of an input signal are common to the respective recording heads. Thus, the number of signal lines between the recording heads and the main body of the recording apparatus is reduced and cost reduction and space saving are attained.

    摘要翻译: 记录头具有被分成多个块的多个记录元件,并且以时分方式驱动每个块。 记录头具有信号产生电路,用于根据用于从记录装置的主体指定驱动块的输入信号产生用于选择驱动块的输出信号。 输入信号的信号线的数量小于输出信号的信号线的数量。 为多种颜色中的每一种提供一个这样的记录头以记录彩色图像。 输入信号的信号线对各记录头是共用的。 因此,记录头和记录装置的主体之间的信号线的数量减少,并且实现了成本降低和节省空间。

    Electronic device
    27.
    发明授权
    Electronic device 失效
    电子设备

    公开(公告)号:US6014132A

    公开(公告)日:2000-01-11

    申请号:US173864

    申请日:1993-12-23

    摘要: An electronic device for entering information comprises a CPU for controlling the entire electronic device, information entry means for obtaining information at a predetermined time interval, and control means for controlling the CPU and the information input means such that, in a first mode in which no information is entered, the predetermined time interval is maintained in preparation for sudden entry of information and an operating clock frequency of the CPU is kept at a low frequency, and in a second mode in which information is entered, the predetermined time interval is maintained and the operating clock frequency of the CPU is kept at a high frequency.

    摘要翻译: 用于输入信息的电子设备包括用于控制整个电子设备的CPU,用于以预定时间间隔获得信息的信息输入装置,以及用于控制CPU和信息输入装置的控制装置,使得在第一模式中, 信息被输入,保持预定的时间间隔以准备突然输入信息,并且CPU的操作时钟频率保持在低频,并且在输入信息的第二模式中,保持预定时间间隔,并且 CPU的工作时钟频率保持在高频。

    Method and system utilizing a negotiation phase to transfer commands and
data in separate modes over a host/peripheral interface
    28.
    发明授权
    Method and system utilizing a negotiation phase to transfer commands and data in separate modes over a host/peripheral interface 失效
    方法和系统利用协商阶段通过主机/外设接口以分开的模式传输命令和数据

    公开(公告)号:US5926650A

    公开(公告)日:1999-07-20

    申请号:US661565

    申请日:1996-06-11

    IPC分类号: G06F13/38 G06F13/42

    CPC分类号: G06F13/4221 G06F2213/0004

    摘要: A command information transfer method and system capable of transferring command information by discriminating it from data information, and capable of using protocols of IEEE P1284, when a nibble or byte mode is incorporated which is stipulated by IEEE P1284 as bi-directional parallel I/F. A new communication mode simulating the extensibility link is set by an extensibility request value undefined by IEEE P1284 and command information is transferred at the second and following bytes of such multiple-byte negotiation. An nFault signal is used for both a notice of error and for a reverse direction information transfer request.

    摘要翻译: 一种命令信息传送方法和系统,其能够通过从数据信息中识别命令信息并且能够使用IEEE P1284的协议,当IEEE P1284规定的半字节或字节模式作为双向并行I / F 。 通过由IEEE P1284未定义的扩展请求值来设置模拟可扩展性链路的新的通信模式,并且在这种多字节协商的第二个和后续字节处传送命令信息。 nFault信号用于错误通知和反向信息传输请求。

    Communication control method and apparatus
    29.
    发明授权
    Communication control method and apparatus 失效
    通信控制方法和装置

    公开(公告)号:US5526161A

    公开(公告)日:1996-06-11

    申请号:US262274

    申请日:1994-06-20

    CPC分类号: H04B10/1143

    摘要: A communication apparatus transmits a test message in one direction by the transmitting unit having narrow directivity capable of changing the transmitting direction, and an indication message which indicates that the test message is being transmitted by a transmitting unit having non directivity. Accordingly, the indication message is transmitted at least to the communicating party's apparatus. Subsequently, the transmitting direction of the test message is sequentially changed, and a similar process is performed. When the communicating party's apparatus detects a reception of the indication message, information indicating a level of the test message is transmitted to the transmitting apparatus as a response. The communication apparatus at the transmitting side detects the direction where the communicating party exists by receiving the information indicating the level. Hereinafter, the information communication is performed to adjust the transmitting unit of narrow directivity to the determined direction.

    摘要翻译: 通信装置通过具有能够改变发送方向的窄方向性的发送单元向一个方向发送测试消息,以及指示由具有非方向性的发送单元正在发送测试消息的指示消息。 因此,指示消息至少传送到通信方的装置。 随后,测试消息的发送方向被顺序地改变,并且执行类似的处理。 当通信方的装置检测到指示消息的接收时,作为响应将指示测试消息的级别的信息作为响应发送到发送装置。 发送侧的通信装置通过接收表示电平的信息来检测通信方存在的方向。 在下文中,执行信息通信以将指向性的发送单位调整到确定的方向。

    Memory control device
    30.
    发明授权
    Memory control device 失效
    内存控制装置

    公开(公告)号:US5477490A

    公开(公告)日:1995-12-19

    申请号:US289259

    申请日:1994-08-11

    CPC分类号: G11C7/00

    摘要: An elastic memory determines an amount of delay of input data relative to other input data according to a phase difference between synchronous pulses each indicating a header of a frame of the associated input data. The elastic memory thus synchronizes both input data in the channel level. Both input data are time-division multiplied by a first multiplier. On the other hand, each counter receives synchronous pulses and thereby counting up to make a ROM produce address value of which order is determined previously according to the counted value. These address values are multiplied by a second multiplier. A decoder controls a RAM, a high-impedance control unit and a flip-flop to write in and read out of the RAM the input data. The read data are divided by a signal restoring device.

    摘要翻译: 弹性存储器根据同步脉冲之间的相位差确定输入数据相对于其他输入数据的延迟量,每个同步脉冲指示相关联的输入数据的帧的标题。 因此,弹性存储器使得信道级别中的两个输入数据同步。 两个输入数据都是时分乘以第一乘法器。 另一方面,每个计数器接收同步脉冲,从而向上计数,使得ROM根据计数值产生先前确定了顺序的地址值。 这些地址值乘以第二乘法器。 解码器控制RAM,高阻抗控制单元和触发器来写入和读出RAM中的输入数据。 读取的数据由信号恢复装置分割。