公开(公告)号：US5933734A

公开(公告)日：1999-08-03

申请号：US813009

申请日：1997-03-04

Applicant: Giuseppe Ferla ,  Ferruccio Frisina

Inventor： Giuseppe Ferla ,  Ferruccio Frisina

IPC: H01L29/74 ,  H01L21/265 ,  H01L21/336 ,  H01L29/423 ,  H01L29/49 ,  H01L29/739 ,  H01L29/749 ,  H01L29/78 ,  H01L21/8236

CPC classification number: H01L29/7802 ,  H01L29/4933 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/4238 ,  H01L2924/0002

Abstract: A high-speed MOS-technology power device integrated structure includes a plurality of elementary functional units formed in a lightly doped semiconductor layer of a first conductivity type, the elementary functional units including channel regions of a second conductivity type covered by a conductive insulated gate layer including a polysilicon layer; the conductive insulated gate layer also including a highly conductive layer superimposed over the polysilicon layer and having a resistivity much lower than the resistivity of the polysilicon layer, so that a resistance introduced by the polysilicon layer is shunted with a resistance introduced by the highly conductive layer and the overall resistivity of the insulated gate layer is lowered.

Abstract translation: 高速MOS技术功率器件集成结构包括形成在第一导电类型的轻掺杂半导体层中的多个基本功能单元，所述基本功能单元包括由导电绝缘栅层覆盖的第二导电类型的沟道区 包括多晶硅层; 导电绝缘栅极层还包括叠加在多晶硅层上的高导电层，并且具有比多晶硅层的电阻率低得多的电阻率，使得由多晶硅层引入的电阻被由高导电层引入的电阻分流 并且绝缘栅极层的整体电阻率降低。

公开(公告)号：US5929674A

公开(公告)日：1999-07-27

申请号：US846757

申请日：1997-04-30

Applicant: Marco Maccarrone ,  Stefano Ghezzi ,  Maurizio Branchetti

Inventor： Marco Maccarrone ,  Stefano Ghezzi ,  Maurizio Branchetti

IPC: H03K17/22 ,  H03L7/00

CPC classification number: H03K17/223

Abstract: The present invention relates to an electronic power on reset circuit of the type including a comparator having at least two inputs and one output for receiving a first reference signal from a generator block and a second signal proportional to a supply voltage from a divider block and for producing an output initialization signal. Advantageously the output is connected to a third turn off enablement input of the comparator through the series of an inverter pair. The generator block and the divider block also include respective turn off enablement inputs connected downstream of the inverter pair.

Abstract translation: 本发明涉及一种电子上电复位电路，其类型包括具有至少两个输入的比较器和一个用于从发生器模块接收第一参考信号的输出端和与分频器模块的电源电压成比例的第二信号， 产生输出初始化信号。 有利地，输出通过一系列逆变器对连接到比较器的第三关断使能输入端。 发电机组和分压器模块还包括连接在逆变器对的下游的相应的关断使能输入。

公开(公告)号：US5920255A

公开(公告)日：1999-07-06

申请号：US902558

申请日：1997-07-29

Applicant: Vanni Poletto ,  Alberto Poma ,  Marco Morelli

Inventor： Vanni Poletto ,  Alberto Poma ,  Marco Morelli

IPC: G01F23/00 ,  G01F23/30 ,  B60Q1/00

CPC classification number: G01F23/0061 ,  G01F23/30

Abstract: The electronic interface circuit can perform ratiometric processing and driving of a signal generated by a fuel-level detector of a vehicle. The circuit uses a current mirror configured so as to send one half of the output current to the input resistance and one half of the output current to earth. The current mirror is controlled by a voltage taken from the input resistance and by a voltage taken from a resistive divider, the latter voltage having been filtered by a low-pass filter, so as to achieve ratiometric processing of the input signal.

Abstract translation: 电子接口电路可以执行比例计算处理和驱动由车辆的燃料液位检测器产生的信号。 该电路使用电流镜，配置为将输出电流的一半发送到输入电阻，输出电流的一半输出到地。 电流镜由从输入电阻取得的电压和从电阻分压器获取的电压来控制，后一电压已被低通滤波器滤波，以便实现输入信号的比例处理。

公开(公告)号：US5913120A

公开(公告)日：1999-06-15

申请号：US502329

申请日：1995-07-13

Applicant: Paolo Giuseppe Cappelletti

Inventor： Paolo Giuseppe Cappelletti

IPC: H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/336

CPC classification number: H01L27/11526 ,  H01L27/11521 ,  H01L27/11541 ,  H01L27/11546 ,  Y10S438/979

Abstract: A process for simultaneously fabricating memory cells, transistors, and diodes for protecting the tunnel oxide layer of the cells, using the DPCC process wherein the first polysilicon layer is not removed from the transistor area, and the gate regions of the transistors are formed by shorted first and second polysilicon layers. To form the diodes, the polyl layer is removed from the active areas in which the diodes are to be formed, using the same mask employed for shaping polyi; the interpoly dielectric layer and the gate oxide layer are removed from the active areas of the diodes, using the same mask employed for removing the dielectric layer from the transistor area; a second polysilicon layer is deposited directly on to the active areas of the diodes; and the poly2 doping ions penetrate the active areas to form N+ regions which, together with the substrate, constitute the protection diodes. The diodes are thus formed prior to shaping poly2, and are connected to the control gates of the cells by the second polycrystalline silicon layer strips forming the word lines.

公开(公告)号：US5912617A

公开(公告)日：1999-06-15

申请号：US929810

申请日：1997-09-15

Applicant: Vanni Poletto ,  Alberto Poma ,  Marco Morelli

Inventor： Vanni Poletto ,  Alberto Poma ,  Marco Morelli

IPC: G01F23/00 ,  H03K17/945 ,  B60Q1/00

CPC classification number: H03K17/945 ,  G01F23/0069 ,  G01F23/0084

Abstract: A circuit for controlling the reserve lamp of a vehicle's fuel level indicator instrument. The circuit uses a switch controlled by an extremely asymmetric clock signal periodically to switch, for a very short time, the signal provided by the level sensor coupled to a comparator operable to compare this signal with a threshold value for the purpose of determining the state of the reserve lamp.

Abstract translation: 一种用于控制车辆燃料液位指示器的储备灯的电路。 该电路使用由非常不对称的时钟信号控制的开关周期性地在非常短的时间内切换耦合到比较器的电平传感器提供的信号，该比较器可用于将该信号与阈值进行比较，以便确定 备用灯。

公开(公告)号：US5903166A

公开(公告)日：1999-05-11

申请号：US811548

申请日：1997-03-04

Applicant: Luigi Pascucci

Inventor： Luigi Pascucci

IPC: G11C7/22 ,  H03K17/16 ,  G11C7/00

CPC classification number: G11C7/22

Abstract: Circuit for immunizing an integrated circuit from noise affecting external enable signals of the integrated circuit generated during switching of circuit blocks internal to the integrated circuit, comprising first means for detecting a switching of said circuit blocks and for driving second means for forcedly activating internal enable signals of the integrated circuit depending on said external enable signals, in order to forcedly maintain said internal control signals activated during said switching of said circuit blocks.

Abstract translation: 用于对集成电路进行免疫的电路免受影响在集成电路内部的电路块切换期间产生的集成电路的外部使能信号的影响，包括用于检测所述电路块的切换和驱动用于强制激活内部使能信号的第二装置的第一装置 取决于所述外部使能信号，以便强制地维持在所述电路块的所述切换期间激活的所述内部控制信号。

公开(公告)号：US5900662A

公开(公告)日：1999-05-04

申请号：US740713

申请日：1996-11-04

Applicant: Ferruccio Frisina ,  Giuseppe Ferla ,  Salvatore Rinaudo

Inventor： Ferruccio Frisina ,  Giuseppe Ferla ,  Salvatore Rinaudo

IPC: H01L21/336 ,  H01L29/08 ,  H01L29/78 ,  H01L29/62

CPC classification number: H01L29/66712 ,  H01L29/7802 ,  H01L29/0847

Abstract: A MOS-gated power device includes a plurality of elementary functional units, each elementary functional unit including a body region of a first conductivity type formed in a semiconductor material layer of a second conductivity type having a first resistivity value. Under each body region a respective lightly doped region of the second conductivity type is provided having a second resistivity value higher than the first resistivity value.

Abstract translation: MOS门控功率器件包括多个基本功能单元，每个基本功能单元包括形成在具有第一电阻率值的第二导电类型的半导体材料层中的第一导电类型的体区。 在每个体区下方提供具有高于第一电阻率值的第二电阻率值的第二导电类型的相应轻掺杂区。

公开(公告)号：US5889562A

公开(公告)日：1999-03-30

申请号：US810029

申请日：1997-03-04

Applicant: Danilo Pau

Inventor： Danilo Pau

IPC: H04N5/907 ,  H03M7/38 ,  H04N5/44 ,  H04N7/01 ,  H04N7/015 ,  H04N7/26 ,  H04N7/32 ,  H04N7/34 ,  H04N7/50 ,  H04N9/64 ,  H04N11/04

CPC classification number: H04N7/0132 ,  H04N11/046 ,  H04N19/423 ,  H04N19/593 ,  H04N19/61 ,  H04N19/98 ,  H04N9/641

Abstract: An SQTV processor is for converting a video signal received at an interlaced scanning frequency of 50 or 60 Hz to an interlaced scanning frequency of 100 or 120 Hz, respectively, and implementing algorithms for noise filtering and of edge definition. The process includes: an analog-digital converter (ADC) of analog input signals of luminance and chrominance; at least a field memory (FIELD MEMORY.sub.-- 1), or more preferably two similar field memories, where digital blocks of luminance (Y) value and blocks of values of each one of the two chrominance (U, V) components of the converted video signals are stored; one "First-In-First-Out" (LINE MEMORY) register for digital values read from the field memory containing the pixels of a whole line of each field; a noise filtering block (NOISE REDUCTION); a sampling frequency converter (SRC) of the fields from 50 or 60 Hz to 100 or 120 Hz; a conversion circuit for the vertical format (VFC), an edge definition (PE) enhancement circuit; and a digital-to-analog converter (DAC) of the processed luminance and chrominance (YUV) signals. The processor further includes a compressing and coding circuit for the converted video signals according to an adaptive differential pulse code modulation (ADPCM) scheme of the digital values to be stored in the field memory (FIELD MEMORY.sub.-- 1) and an ADPCM decoding and decompressing circuit for data read from the field memory (FIELD MEMORY.sub.-- 1). The significative reduction of the total memory requisite produced by the ADPCM pre-compression makes the entire system more readily integratable on a single chip.

Abstract translation: SQTV处理器用于将以50或60Hz的隔行扫描频率接收的视频信号分别转换为100或120Hz的隔行扫描频率，并实现用于噪声滤波和边缘定义的算法。 该过程包括：亮度和色度的模拟输入信号的模数转换器（ADC）; 至少一个场存储器（FIELD MEMORY-1），或更优选两个类似的场存储器，其中转换的视频的两个色度（U，V）分量的亮度（Y）值的数字块和值的块 信号被存储; 一个“先进先出”（LINE MEMORY）寄存器，用于从包含每个字段的整行的像素的场存储器读取的数字值; 噪声滤波块（NOISE REDUCTION）; 50Hz或60Hz至100Hz或120Hz的场的采样频率转换器（SRC）; 用于垂直格式（VFC）的转换电路，边缘定义（PE）增强电路; 和经处理的亮度和色度（YUV）信号的数模转换器（DAC）。 处理器还包括根据要存储在场存储器（FIELD MEMORY-1）中的数字值的自适应差分脉冲编码调制（ADPCM）方案的转换视频信号的压缩和编码电路以及ADPCM解码和解压缩电路 用于从现场存储器读取的数据（FIELD MEMORY-1）。 通过ADPCM预压缩产生的总内存需求的显着减少使整个系统更容易在单个芯片上集成。

公开(公告)号：US5883412A

公开(公告)日：1999-03-16

申请号：US502240

申请日：1995-07-13

Applicant: Giuseppe Ferla ,  Ferruccio Frisina

Inventor： Giuseppe Ferla ,  Ferruccio Frisina

IPC: H01L29/74 ,  H01L21/265 ,  H01L21/336 ,  H01L29/423 ,  H01L29/49 ,  H01L29/739 ,  H01L29/749 ,  H01L29/78 ,  H01L23/48 ,  H01L29/46 ,  H01L29/62

CPC classification number: H01L29/7802 ,  H01L29/4933 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/4238 ,  H01L2924/0002

Abstract: A high-speed MOS-technology power device integrated structure includes a plurality of elementary functional units formed in a lightly doped semiconductor layer of a first conductivity type, the elementary functional units including channel regions of a second conductivity type covered by a conductive insulated gate layer including a polysilicon layer; the conductive insulated gate layer also including a highly conductive layer superimposed over the polysilicon layer and having a resistivity much lower than the resistivity of the polysilicon layer, so that a resistance introduced by the polysilicon layer is shunted with a resistance introduced by the highly conductive layer and the overall resistivity of the conductive insulated gate layer is lowered.

Abstract translation: 高速MOS技术功率器件集成结构包括形成在第一导电类型的轻掺杂半导体层中的多个基本功能单元，所述基本功能单元包括由导电绝缘栅层覆盖的第二导电类型的沟道区 包括多晶硅层; 导电绝缘栅极层还包括叠加在多晶硅层上的高导电层，并且具有比多晶硅层的电阻率低得多的电阻率，使得由多晶硅层引入的电阻被由高导电层引入的电阻分流 并且导电绝缘栅极层的整体电阻率降低。

公开(公告)号：US5883009A

公开(公告)日：1999-03-16

申请号：US903531

申请日：1997-07-30

Applicant: Flavio Villa ,  Paolo Ferrari ,  Benedetto Vigna

Inventor： Flavio Villa ,  Paolo Ferrari ,  Benedetto Vigna

IPC: B81B1/00 ,  B81C1/00 ,  G01N27/12 ,  H01L21/764 ,  H01L21/00

CPC classification number: G01N27/12 ,  H01L21/764

Abstract: The chemoresistive gas sensor comprises a heating element integrated in a dedicated SOI substrate having an air gap in the intermediate oxide layer between two wafers of monocrystalline silicon. A sensitive element of tin oxide is formed over the heating element and separated from it by a dielectric insulating and protective layer. A trench formed at the end of the fabrication of the device, extends from the surface of the wafer in which the heating element is integrated, up to the air gap to mechanically separate and insulate the sensitive element from the rest of the chip, thereby improving the mechanical characteristics sensitivity and response of the sensor.

Abstract translation: 化学耐药性气体传感器包括集成在专用SOI衬底中的加热元件，其在中间氧化物层中具有在两晶片之间的单晶硅的气隙。 氧化锡的敏感元件形成在加热元件之上，并通过介电绝缘和保护层与其分离。 在器件制造结束时形成的沟槽从加热元件集成的晶片的表面延伸到气隙，以将敏感元件与芯片的其余部分机械地分离并绝缘，从而改善 传感器的机械特性灵敏度和响应。