公开(公告)号：US20040012486A1

公开(公告)日：2004-01-22

申请号：US10453454

申请日：2003-06-03

Applicant: STMicroelectronics SA

Inventor： Christophe Mani

IPC: H04Q005/22

CPC classification number: G06K7/10029 ,  G06K7/0008

Abstract: An anti-collision method to identify and select contactless electronic modules (MDL) by a terminal is provided. A module may generate a random identification number prior to a communication, and respond to a general or complementary identification request on a time slot that varies according to its identification number. A non-selected module may generate a new random identification number when it receives a complementary identification request. Thus, the time slot of a non-selected module provided in response to a complementary identification request is not statistically the same as its time slot in response to a previous identification request, and it varies according to its identification number (ID).

Abstract translation: 提供了一种通过终端识别和选择非接触电子模块（MDL）的防碰撞方法。 模块可以在通信之前生成随机标识号，并且在根据其标识号变化的时隙上响应一般或补充的标识请求。 未选择的模块可以在接收到补充标识请求时产生新的随机标识号。 因此，响应于补充识别请求而提供的未选择模块的时隙在响应于先前的识别请求时与其时隙在统计上不相同，并且根据其标识号（ID）而变化。

公开(公告)号：US20030234446A1

公开(公告)日：2003-12-25

申请号：US10371397

申请日：2003-02-20

Applicant: STMicroelectronics SA

Inventor： Jean-Luc Diot ,  Christophe Prior ,  Jerome Teysseyre ,  Jean-Pierre Moscicki

IPC: H01L023/48 ,  H01L023/28 ,  H01L021/44

CPC classification number: H01L21/565 ,  H01L23/3107 ,  H01L23/49548 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The leadframe has a perforation to form, between a central platform and a peripheral part located a certain distance apart, radiating elongate leads. The leadframe has, on its rear face that comes into contact with a bearing surface of a mold, at least one recess and a groove for connecting this recess to the perforation.

Abstract translation: 引线框架具有在中心平台和位于一定距离之间的周边部分之间形成穿孔，辐射细长的引线。 所述引线框在其与所述模具的支承表面接触的后表面上具有至少一个凹部和用于将所述凹部连接到所述穿孔的凹槽。

公开(公告)号：US20030233605A1

公开(公告)日：2003-12-18

申请号：US10424166

申请日：2003-04-25

Applicant: STMicroelectronics SA

Inventor： Charaf Hanna

IPC: G11C029/00

CPC classification number: H03M13/2785 ,  H03M13/2707 ,  H03M13/2764

Abstract: A method for interlacing digital data to reduce transmission errors includes dividing a stream of digital data into consecutive blocks of bits, and interlacing each block of bits by writing to an interlacing table. The interlacing table is arranged in the form of rows and columns of memory addresses, with a number of the rows and columns corresponding to predetermined interlacing parameters. The access sequences to the memory addresses for interlacing the blocks of bits are different from each other. The method further includes reading a block of bits in the interlacing table according to a memory addresses access sequence, and also writing bits to a consecutive block of bits according to the memory addresses access sequence during the reading.

Abstract translation: 用于交织数字数据以减少传输错误的方法包括将数字数据流划分成连续的比特块，并且通过写入交织表来交织每个比特块。 交错表以行和列的存储器地址的形式排列，其中多个行和列对应于预定的交织参数。 到用于交错位块的存储器地址的访问序列彼此不同。 该方法还包括根据存储器地址访问序列读取交织表中的位块，并且还在读取期间根据存储器地址访问顺序将位写入连续的位块。

公开(公告)号：US20030223289A1

公开(公告)日：2003-12-04

申请号：US10420533

申请日：2003-04-22

Applicant: STMicroelectronics SA

Inventor： Filipe Ganivet ,  Francesco La Rosa ,  Thierry Giovinazzi

IPC: G11C029/00

CPC classification number: G11C16/30

Abstract: An electrically erasable and programmable memory includes an array of memory cells, and a distribution line linked to a receiving terminal of an external supply voltage and to a booster circuit. The distribution line provides an internal supply voltage. The distribution line is also linked to the receiving terminal through a diode or a diode circuit simulating operation of a diode. The memory includes a regulator for triggering the booster circuit when the internal supply voltage becomes lower than a threshold so as to maintain the internal supply voltage close to the threshold when the external supply voltage is too low, at least during the reading of memory cells. The diode or the diode circuit is blocked when the external supply voltage is too low.

Abstract translation: 电可擦除和可编程存储器包括存储器单元的阵列，以及连接到外部电源电压的接收端的分配线和升压电路。 配电线路提供内部电源电压。 分配线还通过模拟二极管的操作的二极管或二极管电路与接收端相连。 存储器包括用于当内部电源电压变得低于阈值时触发升压电路的稳压器，以便至少在读取存储器单元期间，当外部电源电压太低时，内部电源电压保持接近阈值。 当外部电源电压太低时，二极管或二极管电路被阻塞。

公开(公告)号：US20030219126A1

公开(公告)日：2003-11-27

申请号：US10388324

申请日：2003-03-12

Applicant: STMicroelectronics SA

Inventor： Sylvie Wuidart

IPC: H04N007/167

CPC classification number: H04K3/41 ,  G06F21/755 ,  G06K19/07363 ,  H01L23/585 ,  H01L24/06 ,  H01L2924/12035 ,  H01L2924/13091 ,  H01L2924/14 ,  H04K3/60 ,  H04K3/825 ,  H04K2203/20 ,  H01L2924/00

Abstract: A method for scrambling current consumption of an integrated circuit, at least during execution of a confidential operation by the integrated circuit that includes reading confidential data stored therein and/or the calculation of an encryption code is provided. The charge pump is activated to generate current consumption fluctuations on the electrical power supply line of the integrated circuit, at an intensity great enough to mask the current consumption variations associated with the execution of the confidential operation.

Abstract translation: 提供一种用于加扰集成电路的电流消耗的方法，至少在由包括读取存储在其中的机密数据和/或加密代码的计算的集成电路执行机密操作期间。 电荷泵被激活以在集成电路的电源线上产生电流消耗波动，强度足以掩盖与执行机密操作相关联的当前消耗变化。

公开(公告)号：US20030218924A1

公开(公告)日：2003-11-27

申请号：US10406632

申请日：2003-04-03

Applicant: STMicroelectronics SA

Inventor： Benjamin Duval ,  Fabrice Marinet

IPC: G11C029/00

CPC classification number: G11C17/18

Abstract: A method of programming a row of antifuse memory cells includes breaking down at least N antifuse elements in the memory cells. The breakdown includes the application of a breakdown voltage to the anode of each antifuse element. The antifuse elements are broken down sequentially by groups of P antifuse elements, with P being less than N and at least equal to 1. The antifuse elements of a same group simultaneously receive the breakdown voltage. The breakdown of a next group of antifuse elements immediately takes place after the breakdown of a previous group of antifuse elements.

Abstract translation: 一种编程反熔丝存储单元的行的方法包括在存储单元中分解至少N个反熔丝元件。 击穿包括向每个反熔丝元件的阳极施加击穿电压。 反熔丝元件依次由P个反熔丝元件分组，其中P小于N并且至少等于1.同一组的反熔丝元件同时接收击穿电压。 下一组反熔丝元件的故障立即发生在上一组反熔丝元件击穿之后。

公开(公告)号：US5883833A

公开(公告)日：1999-03-16

申请号：US703811

申请日：1996-08-27

Applicant: David Naura ,  Jean Devin

Inventor： David Naura ,  Jean Devin

IPC: G11C16/12 ,  G11C16/14 ,  G11C11/34

CPC classification number: G11C16/14 ,  G11C16/12

Abstract: A method and apparatus for the programming and erasure of a memory cell made out of floating-gate transistors and to the circuit pertaining thereto is described. It can be applied especially to non-volatile electrically erasable and programmable memories, for example EEPROMs and flash EPROMs. A programming voltage or erasure voltage including a voltage shift equal in value to a reference voltage is produced, followed by a voltage ramp comprising a rising phase followed possibly by voltage plateau, this voltage ramp being shifted in voltage by the value of the reference voltage and being followed, in turn, by a voltage drop. The value of the voltage shift is fixed at an intermediate value that is lower than the value of a so-called tunnel voltage of the memory cell but greater than the supply voltage.

Abstract translation: 描述了由浮栅晶体管制成的存储单元的编程和擦除以及与其有关的电路的方法和装置。 它可以特别适用于非易失性电可擦除和可编程存储器，例如EEPROM和闪存EPROM。 产生包括与参考电压值相等的电压偏移的编程电压或擦除电压，随后是包括可能伴随电压平台的上升相的电压斜坡，该电压斜坡在电压上移动参考电压的值， 随之而来的是电压降。 电压偏移的值固定在比存储单元的所谓的隧道电压的值低的值的中间值，但大于电源电压。

公开(公告)号：US3290417A

公开(公告)日：1966-12-06

申请号：US46049465

申请日：1965-06-01

Applicant: PITTSBURGH PLATE GLASS CO

Inventor： CHRISTENSON ROGER M ,  PORTER JR SAMUEL ,  ANDREW HALCOUSSIS

IPC: C08F8/30 ,  C08F12/12 ,  C08F20/34 ,  C08F220/28 ,  C08L61/32 ,  C09D125/14 ,  C09D133/06 ,  C09D157/04 ,  C09D161/32 ,  C09D167/00

CPC classification number: C08F212/08 ,  C08F8/30 ,  C08F20/34 ,  C08F220/06 ,  C08F220/14 ,  C08F220/28 ,  C08F2220/1825 ,  C08F2220/1858 ,  C08F2220/281 ,  C08F2800/20 ,  C08K5/34 ,  C08L33/06 ,  C08L61/20 ,  C08L61/32 ,  C08L67/00 ,  C08L101/02 ,  C09D125/14 ,  C09D133/062 ,  C09D133/064 ,  C09D157/04 ,  C09D161/32 ,  C09D167/00 ,  C08L2666/14 ,  C08L2666/36 ,  C08L2666/02

Abstract: 1,131,920. Coating. P.P.G. INDUSTRIES, Inc. 5 July, 1966, No. 30114/66. Headings B2E and B2K. [Also in Division C3] Compositions suitable for providing heatcurable coatings on substrates such as glass, wood, hardboard, plastics and metals, e.g. steel, treated steel or aluminium, comprise a solvent and, as essential film-forming component, an interpolymer of (a) 2-25 mole per cent of a hydroxyalkyl ester of an ethylenically unsaturated carboxylic acid (b) 0.1-20 mole per cent of an ethylenically unsaturated carboxylic acid and (c) at least one ethylenically unsaturated comonomer, the composition containing at least 0.1 per cent by weight, based on the weight of the interpolymer, of polymerised carboxylic acid units which have been reacted with an alkylenimine or substituted alkylenimine. In a modification, the iminated carboxylic acid units are present in a separate polymer which is blended with the hydroxyalkyl ester interpolymer. The composition may include an additional resinous component which is coreactive with the interpolymer to form cross-links. Such resins include aminealdehyde products which may be etherified, alkyd resins, polyepoxides, epoxy esters, vinyl halide polymers, cellulosic polymers, polysiloxanes and phenolic resins. A pigment, e.g. carbon black or phthalocyanine blue, may be included; other additives include acrylic polymers, p-phenylene diamine, mono- or di-nbutyl phosphate, additional solvents, plasticisers and fillers. The coatings are preferably applied by spraying and can be cured by baking at 150-300‹F for 10-40 minutes.

公开(公告)号：US2901507A

公开(公告)日：1959-08-25

申请号：US50220655

申请日：1955-04-18

Applicant: UPJOHN CO

Inventor： SPEETER MERRILL E ,  BIRKENMEYER ROBERT D

IPC: C07C233/12 ,  C07D211/08

CPC classification number: C07D211/08 ,  C07C233/12

公开(公告)号：US2836698A

公开(公告)日：1958-05-27

申请号：US35495253

申请日：1953-05-14

Applicant: GEN MOTORS CORP

Inventor： FRY MILLARD E

IPC: F24C15/10

CPC classification number: F24C15/102