公开(公告)号：US20250028658A1

公开(公告)日：2025-01-23

申请号：US18224262

申请日：2023-07-20

Applicant: Mellanox Technologies, Ltd.

Inventor： Ortal Ben Moshe ,  Roee Moyal ,  Shay Aisman ,  Gil Bloch ,  Ariel Shahar ,  Roman Nudelman ,  Gil Kremer ,  Yossef Itigin ,  Lior Narkis

IPC: G06F13/16 ,  G06F9/54

Abstract: Systems and methods are described herein for processing data packets. An example network adapter may include a network interface operatively coupled to a communication network and a packet processing circuitry operatively coupled to the network interface. The packet processing circuitry may receive, via the network interface, a message; retrieve, via a packet processing circuitry, a work queue element (WQE) index identifying a position of a WQE in a receive queue; determine that the message is associated with a small payload; process the message without consuming the WQE; receive, via the network interface, a subsequent message; and process the subsequent message using the WQE. In this way, the systems and methods describe herein reduce the latency in processing of the data packets.

公开(公告)号：US20250023705A1

公开(公告)日：2025-01-16

申请号：US18219895

申请日：2023-07-10

Applicant: Mellanox Technologies, Ltd.

Inventor： Wojciech Wasko ,  Dotan David Levi ,  Thomas Kernen

IPC: H04L7/00

Abstract: A network device includes control logic coupled to a receiver. The control logic detects an synchronization packet received via the receiver from a second network device over a network that is precision time protocol unaware. The control logic determines that a portion of the synchronization packet is asserted, indicating that the synchronization packet has incurred congestion traversing the network. The control logic adjusts, based on an assertion of the portion, a weight applied to timestamps associated with sending and receiving the synchronization packet in performing clock synchronization with the second network device.

公开(公告)号：US20250023668A1

公开(公告)日：2025-01-16

申请号：US18351544

申请日：2023-07-13

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Roee Moyal ,  Gil Kremer ,  Ortal Ben Moshe ,  Ariel Shahar

IPC: H04L1/1607 ,  H04L1/08 ,  H04L47/34

Abstract: In one embodiment, a first network device includes a host interface to receive messages from a host device, packet processing circuitry to send a batch of the messages to a second network device without waiting for an acknowledgement receipt from the second network device after sending each message, one message in the batch having a maximum message sequence number (MSN), receive a given acknowledgement receipt from the second network device indicating that all the messages in the batch have been received and including credit data indicating that there is no space in a receive work queue of the second network device for receiving an additional message, and send the additional message having an MSN greater than the maximum MSN to the second network device responsively to receiving the given acknowledgement receipt and based on the credit data indicating that there is no space in the receive work queue.

公开(公告)号：US20250020876A1

公开(公告)日：2025-01-16

申请号：US18897843

申请日：2024-09-26

Applicant: Mellanox Technologies, Ltd.

Inventor： Barak FREEDMAN ,  Henning LYSDAL ,  Amir SILBER ,  Nizan MEITAV

IPC: G02B6/42 ,  G02B6/30

Abstract: Various embodiments of silicon photonic (SiP) chips are provided that are configured for backside or frontside optical fiber coupling. An SiP chip includes a photonic integrated circuit formed on a first surface of a first substrate. The photonic integrated circuit includes at least one optical component and at least one coupling element. The at least one optical component is configured to propagate an optical signal therethrough in a waveguide propagation direction that is substantially parallel to a plane defined by the first surface. The at least one coupling element is configured to couple an optical signal propagating along an optical path transverse to the waveguide propagation direction into the at least one optical component to enable the backside or frontside coupling of an optical fiber to the SiP chip.

公开(公告)号：US20250016110A1

公开(公告)日：2025-01-09

申请号：US18890429

申请日：2024-09-19

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Barak Gafni ,  Aviv Kfir

IPC: H04L47/36

Abstract: Networking devices, systems, and methods are provided. In one example, a method includes receiving a packet at a networking device; evaluating the packet; based on the evaluation of the packet, truncating the packet from a first size to a second size that is smaller than the first size; and storing the truncated packet in a buffer prior to transmitting the truncated packet with the networking device.

公开(公告)号：US12192122B2

公开(公告)日：2025-01-07

申请号：US18581423

申请日：2024-02-20

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Niv Aibester ,  Barak Gafni

IPC: H04L49/103 ,  H04L45/122 ,  H04L47/30 ,  H04L49/9005 ,  H04L49/9047

Abstract: A device includes ports, a packet processor, and a memory management circuit. The ports communicate packets over a network. The packet processor processes the packets using queues. The memory management circuit maintains a shared buffer in a memory and adaptively allocates memory resources from the shared buffer to the queues, maintains in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by the queues, identifies, among the queues, a queue that requires additional memory resources, the queue having an occupancy that is (i) above a current value of a dynamic threshold, rendering the queue ineligible for additional allocation from the shared buffer, and (ii) no more than a defined margin above the current value of the dynamic threshold, rendering the queue eligible for allocation from the shared-reserve memory pool, and allocates memory resources to the identified queue from the shared-reserve memory pool.

公开(公告)号：US20250007856A1

公开(公告)日：2025-01-02

申请号：US18214893

申请日：2023-06-27

Applicant: Mellanox Technologies, Ltd.

Inventor： Yishai OLTCHIK ,  Michael GANDEL GANDELMAN MILGROM ,  Omer SHABTAI

IPC: H04L47/726 ,  H04L47/70 ,  H04L47/80

Abstract: A system and method for performing routing in a computer network implementing in-network computing, including: obtaining information regarding compute resources allocated to an in-network compute operation; and allocating a path and bandwidth for ordinary network traffic based on the allocated compute resources.

公开(公告)号：US12182563B2

公开(公告)日：2024-12-31

申请号：US18092466

申请日：2023-01-03

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Yair Chasdai

IPC: G06F9/445 ,  G06F8/65 ,  G06F13/10

Abstract: A peripheral device includes a bus interface, a first processor and a second processor. The bus interface is to communicate over a peripheral bus. The first processor is to manage communication over the peripheral bus by executing bus-maintenance software code, the bus-maintenance software code being executed from one or more first layers of a multi-layer memory. The second processor is to update the bus-maintenance software code from an existing version to an updated version, by (i) loading the updated version to one or more second layers of the multi-layer memory, higher in hierarchy than the one or more first layers, and (ii) invalidating the existing version in the one or more first layers, thereby forcing fetching of the updated version from the one or more second layers to the one or more first layers and to start executing the updated version.

公开(公告)号：US12182075B2

公开(公告)日：2024-12-31

申请号：US18092696

申请日：2023-01-03

Applicant: Mellanox Technologies, Ltd.

Inventor： Siddha Ganju ,  Itamar Frenkel ,  Elad Mentovich ,  Rotem Barzilai ,  Yaakov Gridish

IPC: G06F16/174 ,  G06N20/10

Abstract: Systems, computer program products, and methods are described herein for intelligent data compression, in accordance with an embodiment of the invention. The present invention may be configured to receive a plurality of files for storage in a database and perform a series of steps iteratively, for each file of the plurality of files, and until each file of the plurality of files is represented in the database. The series of steps may include identifying one or more data points in the respective file, where each identified data point was previously unidentified in the database and adding the identified one or more data points to the database. The series of steps may also include identifying one or more features of the respective file for storage in the database and storing the identified one or more features in the database as a surrogate for the respective file.

公开(公告)号：US12171056B2

公开(公告)日：2024-12-17

申请号：US17844275

申请日：2022-06-20

Applicant: Mellanox Technologies Ltd.

Inventor： Igor Loiferman ,  Tomer Klein ,  Rom Becker

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/30

Abstract: A device may include a printed circuit board (PCB), a plurality of surface-mount devices disposed on the PCB, wherein a thermal mass of each of the surface-mount devices ranges between a first thermal mass value and a second thermal mass value that is greater than the first thermal mass value, and a plurality of thermal capacitors disposed on the PCB, wherein a thermal mass of each of the thermal capacitors is equal to or greater than the first thermal mass value of the surface-mount devices.