Integrated circuit having transistors with different threshold voltages
    361.
    发明授权
    Integrated circuit having transistors with different threshold voltages 有权
    具有不同阈值电压的晶体管的集成电路

    公开(公告)号:US06262456B1

    公开(公告)日:2001-07-17

    申请号:US09187842

    申请日:1998-11-06

    Inventor: Bin Yu Ming-Ren Lin

    Abstract: An ultra-large-scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs include gate structures with a polysilicon material. The polysilicon material is implanted with lower concentrations of germanium where lower threshold voltage MOSFETs are required. Over a range of 0-60% concentration of germanium, the threshold voltage can be varied by roughly 240 mV.

    Abstract translation: 超大规模集成(ULSI)电路包括具有不同阈值电压但具有相同通道特性的MOSFET。 MOSFET包括具有多晶硅材料的栅极结构。 用较低浓度的锗注入多晶硅材料,其中需要较低的阈值电压MOSFET。 在锗的0-60%浓度范围内,阈值电压可以改变大约240mV。

    Mos transistor with dual pocket implant
    362.
    发明授权
    Mos transistor with dual pocket implant 有权
    具有双口袋植入物的Mos晶体管

    公开(公告)号:US06255174B1

    公开(公告)日:2001-07-03

    申请号:US09334121

    申请日:1999-06-15

    Applicant: Bin Yu

    Inventor: Bin Yu

    CPC classification number: H01L29/66659 H01L21/26586 H01L29/1045 H01L29/7835

    Abstract: The inventive method and apparatus provides improved semiconductor devices, such as MOSFET's with a delayed threshold voltage roll-off and short channel effects, making the semiconductor devices more tolerant of gate variations for short gate length devices. The invention provides a semiconductor device with an asymmetric channel doping profile. A first pocket dopant implantation with a 0° tilt is used to create a first source dopant pocket and a drain dopant pocket. A second pocket dopant implantation with a 30-60° tilt creates a second source dopant pocket without creating an additional drain dopant pocket, thus creating the asymmetric doping profile.

    Abstract translation: 本发明的方法和装置提供改进的半导体器件,例如具有延迟的阈值电压滚降和短沟道效应的MOSFET,使半导体器件更容忍对于短栅极长度器件的栅极变化。 本发明提供了具有不对称沟道掺杂分布的半导体器件。 使用具有0°倾斜的第一种杂质掺杂剂注入来产生第一源掺杂剂阱和漏极掺杂剂袋。 具有30-60°倾斜的第二袋式掺杂剂注入产生第二源掺杂剂袋而不产生附加的漏极掺杂剂袋,从而产生不对称掺杂分布。

    Method for effective fabrication of a field effect transistor with
elevated drain and source contact structures
    363.
    发明授权
    Method for effective fabrication of a field effect transistor with elevated drain and source contact structures 有权
    有效制造具有升高的漏极和源极接触结构的场效应晶体管的方法

    公开(公告)号:US6087235A

    公开(公告)日:2000-07-11

    申请号:US418276

    申请日:1999-10-14

    Applicant: Bin Yu

    Inventor: Bin Yu

    CPC classification number: H01L29/66628 H01L29/0847 H01L29/665 H01L29/66545

    Abstract: A field effect transistor is fabricated to have elevated drain and source contact structures with prevention of short-channel effects and leakage current which may result due to the formation of facetted surfaces on the elevated drain and source contact structures near the gate of the field effect transistor. The field effect transistor includes a drain extension implant, a source extension implant, a gate dielectric, a gate structure disposed over the gate dielectric, and a first spacer disposed on sidewalls of the gate dielectric and of the gate structure. An elevated drain contact structure is selectively grown on the drain extension implant and has a drain facetted surface facing toward the first spacer on the sidewall of the gate structure. Similarly, an elevated source contact structure is selectively grown on the source extension implant and has a source facetted surface facing toward the first spacer on the sidewall of the gate structure. A second spacer is formed to cover the drain facetted surface and the source facetted surface before dopant implantation into and silicide formation on the elevated drain and source contact structures. In this manner, the dopant is prevented from being implanted into the drain facetted surface and the source facetted surface such that short-channel effects are minimized in the field effect transistor of the present invention. In addition, formation of silicide on the drain facetted surface and the source facetted surface is prevented to minimize leakage current through the drain and source extension implants of the field effect transistor of the present invention.

    Abstract translation: 制造场效应晶体管具有升高的漏极和源极接触结构,防止短沟道效应和漏电流,这可能是由于在场效应晶体管的栅极附近的升高的漏极和源极接触结构上形成刻面 。 场效应晶体管包括漏极延伸注入,源极延伸注入,栅极电介质,设置在栅极电介质上的栅极结构,以及设置在栅极电介质和栅极结构的侧壁上的第一间隔物。 升高的漏极接​​触结构选择性地生长在漏极延伸植入物上,并且具有面向栅极结构的侧壁上的第一间隔物的漏极分面表面。 类似地,升高的源极接触结构选择性地生长在源极延伸植入物上,并且具有面向栅极结构的侧壁上的第一间隔物的源极分面。 形成第二间隔物以在掺杂剂注入到高架漏极和源极接触结构之间的硅化物形成之前覆盖漏极分面和源极面表面。 以这种方式,防止了掺杂剂被注入到漏极刻面和源极刻面中,使得在本发明的场效应晶体管中短沟道效应最小化。 此外,防止在漏极表面和源极面上形成硅化物以使通过本发明的场效应晶体管的漏极和源延伸注入的漏电流最小化。

    Low-voltage punch-through transient suppressor employing a dual-base
structure
    364.
    发明授权
    Low-voltage punch-through transient suppressor employing a dual-base structure 失效
    采用双基结构的低压穿通瞬态抑制器

    公开(公告)号:US6015999A

    公开(公告)日:2000-01-18

    申请号:US39926

    申请日:1998-03-16

    CPC classification number: H01L29/8618 H01L29/861 H01L29/866

    Abstract: A punch-through diode transient suppression device has a base region of varying doping concentration to improve leakage and clamping characteristics. The punch-through diode includes a first region comprising an n+ region, a second region comprising a p- region abutting the first region, a third region comprising a p+ region abutting the second region, and a fourth region comprising an n+ region abutting the third region. The peak dopant concentration of the n+ layers should be about 1.5E18 cm.sup.-3, the peak dopant concentration of the p+ layer should be between about 1 to about 5 times the peak concentration of the n+ layer, and the dopant concentration of the p- layer should be between about 0.5E14 cm.sup.-3 and about 1.OE17 cm.sup.-3. The junction depth of the fourth (n+) region should be greater than about 0.3 .mu.m. The thickness of the third (p+) region should be between about 0.3 .mu.m and about 2.0 .mu.m, and the thickness of the second (p-) region should be between about 0.5 .mu.m and about 5.0 .mu.m.

    Abstract translation: 穿通二极管瞬态抑制器件具有改变掺杂浓度的基极区域,以改善泄漏和钳位特性。 穿通二极管包括包括n +区域的第一区域,包括邻接第一区域的p-区域的第二区域,包括邻接第二区域的p +区域的第三区域,以及包括邻接第三区域的n +区域的第四区域 地区。 n +层的峰值掺杂剂浓度应为约1.5E18cm-3,p +层的峰值掺杂剂浓度应在n +层的峰值浓度的约1至约5倍之间, 层应在约0.5E14cm-3和约1.0E17cm-3之间。 第四(n +)区域的结深度应大于约0.3μm。 第三(p +)区域的厚度应在约0.3μm至约2.0μm之间,第二(p-)区域的厚度应在约0.5μm至约5.0μm之间。

    Biosensor and method of making same
    367.
    发明申请
    Biosensor and method of making same 有权
    生物传感器及其制作方法

    公开(公告)号:US20160003813A1

    公开(公告)日:2016-01-07

    申请号:US10888342

    申请日:2004-07-09

    Abstract: Sensors suitable for the sensing/detection of biological or chemical agents may be fabricated by immobilizing biological and/or chemical recognition components (selectors or probes) on a substrate by the polymerization of a suitable monomer in the presence of the selectors or probes, for example, by Polysiloxane Monolayer Immobilization (PMI). PMI may involve the polymerization of polysiloxane onto a substrate, onto which selector molecules are adsorbed or otherwise immobilized. The resulting immobilized selector molecule may then be used to interact with specific molecules (targets) within a mixture of molecules, thereby enabling those specific molecules to be detected and/or quantified.

    Abstract translation: 适于感测/检测生物或化学试剂的传感器可以通过在选择器或探针的存在下通过合适的单体的聚合将生物和/或化学识别组分(选择器或探针)固定在基底上来制备,例如 ,通过聚硅氧烷单层固定(PMI)。 PMI可以涉及将聚硅氧烷聚合到底物上,在其上吸附或以其他方式固定选择分子。 然后可以使得到的固定化选择分子与分子混合物中的特定分子(靶)相互作用,从而使得能够检测和/或定量那些特异性分子。

    Physical uplink control channel power control method and apparatus
    368.
    发明授权
    Physical uplink control channel power control method and apparatus 有权
    物理上行控制信道功率控制方法及装置

    公开(公告)号:US09198136B2

    公开(公告)日:2015-11-24

    申请号:US14008561

    申请日:2012-01-10

    CPC classification number: H04W52/04 H04W52/146 H04W52/325 H04W52/48

    Abstract: The disclosure provides a physical uplink control channel (PUCCH) power control method. A user equipment (UE) determines a power control parameter nHARQ for a PUCCH format 3 transmission and performs power control on the PUCCH format 3 based on the nHARQ. The disclosure also provides a PUCCH power control apparatus. According to the disclosure, for a TDD system, the power control parameter nHARQ for the PUCCH format 3 transmission may be determined, which efficiently solves the problem regarding power control when feedback is performed in PUCCH format 3.

    Abstract translation: 本公开提供了物理上行链路控制信道(PUCCH)功率控制方法。 用户设备(UE)确定用于PUCCH格式3传输的功率控制参数nHARQ,并且基于nHARQ对PUCCH格式3执行功率控制。 本公开还提供了一种PUCCH功率控制装置。 根据本公开,对于TDD系统,可以确定用于PUCCH格式3传输的功率控制参数nHARQ,这有效地解决了在PUCCH格式3中执行反馈时关于功率控制的问题。

    Storing log data efficiently while supporting querying
    369.
    发明授权
    Storing log data efficiently while supporting querying 有权
    有效地存储日志数据,同时支持查询

    公开(公告)号:US09166989B2

    公开(公告)日:2015-10-20

    申请号:US12554541

    申请日:2009-09-04

    Abstract: A logging system includes an event receiver and a storage manager. The receiver receives log data, processes it, and outputs a column-based data “chunk.” The manager receives and stores chunks. The receiver includes buffers that store events and a metadata structure that stores metadata about the contents of the buffers. Each buffer is associated with a particular event field and includes values from that field from one or more events. The metadata includes, for each “field of interest,” a minimum value and a maximum value that reflect the range of values of that field over all of the events in the buffers. A chunk is generated for each buffer and includes the metadata structure and a compressed version of the buffer contents. The metadata structure acts as a search index when querying event data. The logging system can be used in conjunction with a security information/event management (SIEM) system.

    Abstract translation: 记录系统包括事件接收器和存储管理器。 接收器接收日志数据,处理它,并输出基于列的数据“块”。管理器接收并存储块。 接收器包括存储事件的缓冲器和存储关于缓冲器的内容的元数据的元数据结构。 每个缓冲区与一个特定事件字段相关联,并包含一个或多个事件的该字段的值。 对于每个“感兴趣的领域”,元数据包括反映缓冲器中所有事件的该字段的值的范围的最小值和最大值。 为每个缓冲区生成一个块,并包括元数据结构和缓冲区内容的压缩版本。 元数据结构在查询事件数据时用作搜索索引。 记录系统可以与安全信息/事件管理(SIEM)系统结合使用。

    Radio frame and sounding reference signal sending method in mobile communication system
    370.
    发明授权
    Radio frame and sounding reference signal sending method in mobile communication system 有权
    移动通信系统中的无线电帧和探测参考信号发送方法

    公开(公告)号:US09060304B2

    公开(公告)日:2015-06-16

    申请号:US13635981

    申请日:2010-12-29

    CPC classification number: H04W24/10 H04W72/00 H04W88/02 H04W88/08

    Abstract: A radio frame and method are provided for sending a sounding reference signal (SRS) in a mobile communication system, which is used to solve the problem of shortage of resources for sending the SRS in the mobile communication system. The method includes a user equipment (UE) sending the SRS to eNB in time-frequency resources corresponding to a guard space in the radio frame, wherein, the guard space is one or more of downlink to uplink guard space, uplink to downlink guard space, reserved subframes, or reserved idle resources. A device is also provided for sending the SRS, applied to the UE in the mobile communication system, wherein the device includes a radio frame construction module and a sounding reference signal transmission module.

    Abstract translation: 提供一种用于在移动通信系统中发送探测参考信号(SRS)的无线电帧和方法,该移动通信系统用于解决在移动通信系统中用于发送SRS的资源不足的问题。 该方法包括:用户设备(UE)在与无线帧中的保护空间相对应的时间频率资源中向所述eNB发送所述SRS,其中,所述保护空间为下行链路到上行链路保护空间中的一个或多个,上行链路到下行链路保护空间 ,保留的子帧或保留的空闲资源。 还提供了一种用于发送在移动通信系统中应用于UE的SRS的设备,其中该设备包括无线电帧结构模块和探测参考信号传输模块。

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