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    Method and system for accessing non-volatile storage devices
    32.
    发明申请
    Method and system for accessing non-volatile storage devices 有权
    用于访问非易失性存储设备的方法和系统

    公开(公告)号：US20070143532A1

    公开(公告)日：2007-06-21

    申请号：US11313567

    申请日：2005-12-21

    Applicant: Sergey Gorobets ,  Alan Sinclair

    Inventor： Sergey Gorobets ,  Alan Sinclair

    IPC: G06F12/00

    CPC classification number: G06F3/0638 ,  G06F3/0607 ,  G06F3/0679

    Abstract: A mass storage memory system is provided. The memory system includes, re-programmable non-volatile memory cells arranged in a plurality of blocks of memory cells; and a controller that is adapted to receive data via a first interface, and/or a second interface, and data received via the first interface and the second interface is accessible via the first interface and the second interface even if a file name for the data is not provided by a host system or before a write operation is complete. The first interface is a file based interface and the second interface is a logical interface.

    Abstract translation: 提供大容量存储存储器系统。 存储器系统包括布置在存储器单元的多个块中的可重新编程的非易失性存储器单元; 以及适于经由第一接口和/或第二接口接收数据的控制器，并且经由所述第一接口和所述第二接口接收的数据可经由所述第一接口和所述第二接口访问，即使所述数据的文件名 不是由主机系统提供或在写操作完成之前。 第一个接口是一个基于文件的接口，第二个接口是一个逻辑接口。

    Reclaiming Data Storage Capacity in Flash Memories
    35.
    发明申请
    Reclaiming Data Storage Capacity in Flash Memories 有权
    回收闪存中的数据存储容量

    公开(公告)号：US20070030734A1

    公开(公告)日：2007-02-08

    申请号：US11382232

    申请日：2006-05-08

    Applicant: Alan Sinclair ,  Barry Wright

    Inventor： Alan Sinclair ,  Barry Wright

    IPC: G11C16/04

    CPC classification number: G06F17/30218 ,  G06F3/0605 ,  G06F3/0608 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0643 ,  G06F3/0644 ,  G06F3/0652 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7205 ,  G11C16/0483 ,  G11C16/102

    Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. A type of memory block is selected to receive additional data of a file that depends upon the types of blocks into which data of the file have already been written. Blocks containing data are selected for reclaiming any unused capacity therefrom by a process that selects blocks in order starting with those containing the least amount of valid data.

    Abstract translation: 主机系统数据文件直接写入具有每个文件的唯一标识和文件内数据偏移的大型擦除块闪存系统，但不使用任何中间逻辑地址或存储器的虚拟地址空间。 文件存储在存储器中的目录信息由其控制器而不是由主机保存在存储器系统内。 选择一种类型的存储器块以接收取决于已经写入文件的数据的块的类型的文件的附加数据。 选择包含数据的块用于通过从包含最少量有效数据的块开始的顺序选择块的处理从其中回收任何未使用的容量。

    DUAL MEDIA STORAGE DEVICE
    36.
    发明申请
    DUAL MEDIA STORAGE DEVICE 有权
    双媒体存储设备

    公开(公告)号：US20070022241A1

    公开(公告)日：2007-01-25

    申请号：US11537404

    申请日：2006-09-29

    Applicant: Alan Sinclair

    Inventor： Alan Sinclair

    IPC: G06F12/00

    CPC classification number: G06F3/0685 ,  G06F1/3268 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/0634 ,  G06F3/068 ,  G06F12/0866 ,  G06F2212/2022 ,  Y02D10/154

    Abstract: A dual media storage device is provided. Two separate non-volatile mass storage devices, one having a faster access time and a lower capacity than the other, are combined into a single system. A storage controller can direct the flow of data into one device or the other, depending upon various conditions, which might include one mass storage device being unavailable or for certain caching schemes.

    Abstract translation: 提供双媒体存储设备。 两个独立的非易失性大容量存储设备，一个具有更快的访问时间和一个比另一个更低的容量，被组合成单个系统。 根据可能包括一个大容量存储设备不可用或某些高速缓存方案的各种条件，存储控制器可以将数据流引导到一个设备或另一个设备中。

    Ring bus structure and its use in flash memory systems
    38.
    发明申请
    Ring bus structure and its use in flash memory systems 有权

    公开(公告)号：US20060031593A1

    公开(公告)日：2006-02-09

    申请号：US10915039

    申请日：2004-08-09

    Applicant: Alan Sinclair

    Inventor： Alan Sinclair

    IPC: G06F15/16

    CPC classification number: G06F13/42

    Abstract: A system and integrated circuit chips used in the system utilize a bus in the form of a ring to interconnect nodes of individual components for transfer of data and commands therebetween. An example system described is a memory having one or more re-programmable non-volatile memory cell arrays connected to each other and to a system controller by a ring bus.

    Hybrid non-volatile memory system
    39.
    发明申请
    Hybrid non-volatile memory system 审中-公开
    混合非易失性存储器系统

    公开(公告)号：US20050251617A1

    公开(公告)日：2005-11-10

    申请号：US10841379

    申请日：2004-05-07

    Applicant: Alan Sinclair ,  Sergey Gorobets ,  Kevin Conley ,  Carlos Gonzalez

    Inventor： Alan Sinclair ,  Sergey Gorobets ,  Kevin Conley ,  Carlos Gonzalez

    IPC: G06F3/06 ,  G06F12/00 ,  G06F12/02 ,  G06F12/08

    CPC classification number: G06F12/0246 ,  G06F3/061 ,  G06F3/0626 ,  G06F3/0658 ,  G06F3/0679 ,  G06F12/0893 ,  G06F2212/7201 ,  G06F2212/7203 ,  G11C14/0036 ,  G11C14/0045

    Abstract: The present invention presents a hybrid non-volatile system that uses non-volatile memories based on two or more different non-volatile memory technologies in order to exploit the relative advantages of each these technology with respect to the others. In an exemplary embodiment, the memory system includes a controller and a flash memory, where the controller has a non-volatile RAM based on an alternate technology such as FeRAM. The flash memory is used for the storage of user data and the non-volatile RAM in the controller is used for system control data used by the control to manage the storage of host data in the flash memory. The use of an alternate non-volatile memory technology in the controller allows for a non-volatile copy of the most recent control data to be accessed more quickly as it can be updated on a bit by bit basis. In another exemplary embodiment, the alternate non-volatile memory is used as a cache where data can safely be staged prior to its being written to the to the memory or read back to the host.

    Abstract translation: 本发明提出了一种混合非易失性系统，其使用基于两个或多个不同的非易失性存储器技术的非易失性存储器，以利用这些技术相对于其他技术的相对优点。 在示例性实施例中，存储器系统包括控制器和闪存，其中控制器具有基于诸如FeRAM的替代技术的非易失性RAM。 闪存用于存储用户数据，并且控制器中的非易失性RAM用于由控制器用于管理闪存中的主机数据的存储的系统控制数据。 在控制器中使用替代的非易失性存储器技术允许更快速地访问最近的控制数据的非易失性拷贝，因为它可以逐点更新。 在另一个示例性实施例中，备用非易失性存储器用作高速缓存，其中数据可以在其被写入存储器或读回主机之前安全地分级。

    Non-volatile memory and method with non-sequential update block management
    40.
    发明申请
    Non-volatile memory and method with non-sequential update block management 审中-公开
    非易失性存储器和非顺序更新块管理方法

    公开(公告)号：US20050141312A1

    公开(公告)日：2005-06-30

    申请号：US10917867

    申请日：2004-08-13

    Applicant: Alan Sinclair ,  Sergey Gorobets ,  Alan Bennett ,  Peter Smith

    Inventor： Alan Sinclair ,  Sergey Gorobets ,  Alan Bennett ,  Peter Smith

    IPC: G06F11/20 ,  G06F12/02 ,  G11C7/00 ,  G11C11/56 ,  G11C16/10 ,  G11C16/34 ,  G11C29/00

    CPC classification number: G06F11/1666 ,  G06F11/1072 ,  G06F11/141 ,  G06F11/1415 ,  G06F11/1658 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/102 ,  G11C16/105 ,  G11C16/20 ,  G11C29/00 ,  G11C29/76 ,  G11C2211/5641

    Abstract: In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the non-volatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.

    Abstract translation: 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中，非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中，索引被存储在专用于存储索引的块中。 在另一个实施例中，索引被存储在更新块本身中。 在另一个实施例中，索引被存储在每个逻辑单元的标题中。 在另一方面，在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式，在断电之后，可以确定最近写入的逻辑单元的位置，而不必在初始化期间执行扫描。 在另一方面，块被部署顺序地且部分地非顺序地管理，定向到多于一个的逻辑子组。

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