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    Magnetic memory devices including shared lines
    31.
    发明授权
    Magnetic memory devices including shared lines 有权
    包括共享线路的磁存储器件

    公开(公告)号：US09318181B2

    公开(公告)日：2016-04-19

    申请号：US14448717

    申请日：2014-07-31

    Applicant: Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Kee-Moon Chun ,  Hee-Seog Jeon

    Inventor： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Kee-Moon Chun ,  Hee-Seog Jeon

    IPC: G11C11/00 ,  G11C11/16

    CPC classification number: G11C11/1675 ,  G11C11/16 ,  G11C11/1659

    Abstract: A magnetic memory device includes word lines, bit lines intersecting the word lines, magnetic memory elements disposed at intersections between the word lines and the bit lines, and selection transistors connected to the word lines. The magnetic memory elements share a word line among the plurality of word lines and also share a selection transistor connected to the word line that is shared among the selection transistors. Related systems and operating methods are also described.

    Abstract translation: 磁存储装置包括字线，与字线交叉的位线，设置在字线和位线之间的交叉处的磁存储元件，以及连接到字线的选择晶体管。 磁存储元件在多个字线之间共享字线，并且共享连接到在选择晶体管之间共享的字线的选择晶体管。 还描述了相关系统和操作方法。

    RESISTIVE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
    32.
    发明申请
    RESISTIVE MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权
    电阻记忆体装置及其操作方法

    公开(公告)号：US20160012890A1

    公开(公告)日：2016-01-14

    申请号：US14645701

    申请日：2015-03-12

    Applicant: HYUN-KOOK PARK ,  DAE-SEOK BYEON ,  YEONG-TAEK LEE ,  HYO-JIN KWON ,  YONG-KYU LEE

    Inventor： HYUN-KOOK PARK ,  DAE-SEOK BYEON ,  YEONG-TAEK LEE ,  HYO-JIN KWON ,  YONG-KYU LEE

    IPC: G11C13/00 ,  G11C11/56

    CPC classification number: G11C13/0069 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/5607 ,  G11C11/5664 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0064 ,  G11C13/0097 ,  G11C2013/0076 ,  G11C2213/71

    Abstract: Provided are a resistive memory device and a method of the resistive memory device. The method of operating the resistive memory device includes performing a pre-read operation on memory cells in response to a write command; performing an erase operation on one or more first memory cells on which a reset write operation is to be performed, determined based on a result of comparing pre-read data from the pre-read operation with write data; and performing set-direction programming on at least some memory cells from among the erased one or more first memory cells and on one or more second memory cells on which a set write operation is to be performed.

    Abstract translation: 提供了电阻式存储器件和电阻式存储器件的方法。 操作电阻式存储器件的方法包括：响应写入命令对存储器单元执行预读取操作; 基于将来自预读取操作的预读数据与写数据进行比较确定的一个或多个要执行复位写操作的第一存储单元执行擦除操作; 并且对被擦除的一个或多个第一存储器单元中的至少一些存储器单元以及要执行设定写入操作的一个或多个第二存储器单元执行设置方向编程。

    Magnetic Memory Devices Including Magnetic Memory Cells Having Opposite Magnetization Directions
    34.
    发明申请
    Magnetic Memory Devices Including Magnetic Memory Cells Having Opposite Magnetization Directions 有权
    包括具有相反磁化方向的磁记忆体的磁存储器件

    公开(公告)号：US20150179244A1

    公开(公告)日：2015-06-25

    申请号：US14509756

    申请日：2014-10-08

    Applicant: Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Hee-Seog Jeon

    Inventor： Bo-Young Seo ,  Yong-Kyu Lee ,  Choong-Jae Lee ,  Hee-Seog Jeon

    IPC: G11C11/16

    CPC classification number: G11C11/161 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

    Abstract: A magnetic memory device includes first and second magnetic memory cells coupled to first and second bit lines, respectively. The first and second magnetic memory cells respectively include a pinned magnetic layer, a free magnetic layer, and a tunnel insulating layer therebetween. Respective stacking orders of the pinned magnetic layer, the tunnel insulating layer, and the free magnetic layer are different in the first and second magnetic memory cells. The magnetic memory device further includes at least one transistor that is configured to couple the first and second magnetic memory cells to a common source line. Related methods of operation are also discussed.

    Abstract translation: 磁存储器件包括分别耦合到第一和第二位线的第一和第二磁存储器单元。 第一和第二磁存储单元分别包括钉扎磁性层，自由磁性层和隧道绝缘层。 固定磁性层，隧道绝缘层和自由磁性层的各个堆叠顺序在第一和第二磁性存储单元中是不同的。 磁存储器件还包括至少一个晶体管，其被配置为将第一和第二磁存储器单元耦合到公共源极线。 还讨论了相关的操作方法。

    Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same
    36.
    发明授权
    Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same 有权
    电可擦除可编程只读存储器（EEPROM）单元及其形成和读取方法

    公开(公告)号：US07944753B2

    公开(公告)日：2011-05-17

    申请号：US12912517

    申请日：2010-10-26

    Applicant: Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    Inventor： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    IPC: G11C16/04

    CPC classification number: G11C16/0433 ,  G11C16/26 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529

    Abstract: In a method of reading data in an EEPROM cell, a bit line voltage for reading is applied to the EEPROM cell including a memory transistor and a selection transistor. A first voltage is applied to a sense line of the memory transistor. A second voltage greater than the first voltage is applied to a word line of the selection transistor. A current passing through the EEPROM cell is compared with a predetermined reference current to read the data stored in the EEPROM cell. An on-cell current of the EEPROM cell may be increased in an erased state and the data in the cell may be readily discriminated.

    Abstract translation: 在EEPROM单元中读取数据的方法中，用于读取的位线电压被施加到包括存储晶体管和选择晶体管的EEPROM单元。 第一电压被施加到存储晶体管的感测线。 大于第一电压的第二电压被施加到选择晶体管的字线。 将通过EEPROM单元的电流与预定的参考电流进行比较，以读取存储在EEPROM单元中的数据。 可以在擦除状态下增加EEPROM单元的通电池电流，并且可以容易地区分单元中的数据。

    Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same
    37.
    发明授权
    Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same 有权
    电可擦除可编程只读存储器（EEPROM）单元及其形成和读取方法

    公开(公告)号：US07839680B2

    公开(公告)日：2010-11-23

    申请号：US12192839

    申请日：2008-08-15

    Applicant: Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    Inventor： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    IPC: G11C16/04

    CPC classification number: G11C16/0433 ,  G11C16/26 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529

    Abstract: In a method of reading data in an EEPROM cell, a bit line voltage for reading is applied to the EEPROM cell including a memory transistor and a selection transistor. A first voltage is applied to a sense line of the memory transistor. A second voltage greater than the first voltage is applied to a word line of the selection transistor. A current passing through the EEPROM cell is compared with a predetermined reference current to read the data stored in the EEPROM cell. An on-cell current of the EEPROM cell may be increased in an erased state and the data in the cell may be readily discriminated.

    Abstract translation: 在EEPROM单元中读取数据的方法中，用于读取的位线电压被施加到包括存储晶体管和选择晶体管的EEPROM单元。 第一电压被施加到存储晶体管的感测线。 大于第一电压的第二电压被施加到选择晶体管的字线。 将通过EEPROM单元的电流与预定的参考电流进行比较，以读取存储在EEPROM单元中的数据。 可以在擦除状态下增加EEPROM单元的通电池电流，并且可以容易地区分单元中的数据。

    MASK ROM DEVICE, SEMICONDUCTOR DEVICE INCLUDING THE MASK ROM DEVICE, AND METHODS OF FABRICATING MASK ROM DEVICE AND SEMICONDUCTOR DEVICE
    38.
    发明申请
    MASK ROM DEVICE, SEMICONDUCTOR DEVICE INCLUDING THE MASK ROM DEVICE, AND METHODS OF FABRICATING MASK ROM DEVICE AND SEMICONDUCTOR DEVICE 失效
    掩蔽ROM器件，包括掩模ROM器件的半导体器件，以及制造掩模ROM器件和半导体器件的方法

    公开(公告)号：US20100285641A1

    公开(公告)日：2010-11-11

    申请号：US12836066

    申请日：2010-07-14

    Applicant: Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Young-Ho Kim ,  Myung-Jo Chun ,  Jung-Ho Moon

    Inventor： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Young-Ho Kim ,  Myung-Jo Chun ,  Jung-Ho Moon

    IPC: H01L21/8238 ,  H01L21/8234

    CPC classification number: H01L27/105 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/1052 ,  H01L27/11266 ,  H01L27/11293

    Abstract: A mask read-only memory (ROM) device, which can stably output data, includes an on-cell and an off-cell. The on-cell includes an on-cell gate structure on a substrate and an on-cell junction structure within the substrate. The off-cell includes an off-cell gate structure on the substrate and an off-cell junction structure within the substrate. The on-cell gate structure includes an on-cell gate insulating film, an on-cell gate electrode and an on-cell gate spacer. The on-cell junction structure includes first and second on-cell ion implantation regions of a first polarity and third and fourth on-cell ion implantation regions of a second polarity. The off-cell gate structure includes an off-cell gate insulating film, an off-cell gate electrode and an off-cell gate spacer. The off-cell junction structure includes first and second off-cell ion implantation regions of the first polarity and a third off-cell ion implantation region of the second polarity.

    Abstract translation: 可以稳定地输出数据的掩模只读存储器（ROM）装置包括接通电池和截止电池。 开放单元包括衬底上的孔上栅极结构和衬底内的电池单元结结构。 离子电池包括在衬底上的离子电池栅极结构和衬底内的细胞外结合结构。 单体栅极结构包括单元间栅极绝缘膜，单晶体栅极电极和单元间栅极间隔物。 该单电池结结构包括具有第一极性的第一和第二开孔离子注入区和第二极性的第三和第四接通电离子注入区。 离群栅极结构包括离子栅极绝缘膜，离子阱栅极电极和非电池栅极间隔物。 离电池结结构包括具有第一极性的第一和第二离子外离子注入区域和第二极性的第三离子间离子注入区域。

    Mask ROM and method of fabricating the same
    39.
    发明申请
    Mask ROM and method of fabricating the same 审中-公开
    掩模ROM及其制造方法

    公开(公告)号：US20100059888A1

    公开(公告)日：2010-03-11

    申请号：US12590482

    申请日：2009-11-09

    Applicant: Yong-Kyu Lee ,  Hee-Seog JEON ,  Jeong-Uk HAN ,  Young-Ho Kim ,  Myung-Jo Chun

    Inventor： Yong-Kyu Lee ,  Hee-Seog JEON ,  Jeong-Uk HAN ,  Young-Ho Kim ,  Myung-Jo Chun

    IPC: H01L23/532 ,  H01L23/48

    CPC classification number: H01L27/1021

    Abstract: A mask read-only memory (ROM) includes a dielectric layer formed on a substrate and a plurality of first conductive lines formed on the dielectric layer. A plurality of diodes are formed in the first conductive lines, and a plurality of final vias are formed for a first set of the diodes each representing a first type of memory cell, with no final via being formed for a second set of diodes each representing a second type of memory cell. Each of a plurality of second conductive lines is formed over a column of the diodes.

    Abstract translation: 掩模只读存储器（ROM）包括形成在基板上的电介质层和形成在电介质层上的多个第一导电线。 在第一导线中形成多个二极管，并且为第一组二极管形成多个最终通孔，每个二极管表示第一类型的存储单元，没有形成用于第二组二极管的最终通孔，每个二极管表示 第二种类型的存储单元。 多个第二导电线中的每一个形成在二极管的列上。

    Electrically Erasable Programmable Read-Only Memory (EEPROM) Cell and Methods for Forming and Reading the Same
    40.
    发明申请
    Electrically Erasable Programmable Read-Only Memory (EEPROM) Cell and Methods for Forming and Reading the Same 有权
    电可擦除可编程只读存储器（EEPROM）单元及其形成和读取方法

    公开(公告)号：US20090059664A1

    公开(公告)日：2009-03-05

    申请号：US12192839

    申请日：2008-08-15

    Applicant: Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    Inventor： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    IPC: G11C16/04 ,  G11C7/00 ,  G11C16/06 ,  H01L21/336

    CPC classification number: G11C16/0433 ,  G11C16/26 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529

    Abstract: In a method of reading data in an EEPROM cell, a bit line voltage for reading is applied to the EEPROM cell including a memory transistor and a selection transistor. A first voltage is applied to a sense line of the memory transistor. A second voltage greater than the first voltage is applied to a word line of the selection transistor. A current passing through the EEPROM cell is compared with a predetermined reference current to read the data stored in the EEPROM cell. An on-cell current of the EEPROM cell may be increased in an erased state and the data in the cell may be readily discriminated.

    Abstract translation: 在EEPROM单元中读取数据的方法中，用于读取的位线电压被施加到包括存储晶体管和选择晶体管的EEPROM单元。 第一电压被施加到存储晶体管的感测线。 大于第一电压的第二电压被施加到选择晶体管的字线。 将通过EEPROM单元的电流与预定的参考电流进行比较，以读取存储在EEPROM单元中的数据。 可以在擦除状态下增加EEPROM单元的通电池电流，并且可以容易地区分单元中的数据。

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