公开(公告)号：US20190073976A1

公开(公告)日：2019-03-07

申请号：US15980437

申请日：2018-05-15

Applicant: Apple Inc.

Inventor： Shin-Hung Yeh ,  Abbas Jamshidi Roudbari ,  Ting-Kuo Chang

IPC: G09G3/36 ,  G09G3/00 ,  H01L27/12 ,  G02F1/1362

CPC classification number: G09G3/3666 ,  G02F1/136286 ,  G02F2201/121 ,  G09G3/002 ,  G09G3/3648 ,  G09G2300/0413 ,  G09G2300/0426 ,  G09G2300/0478 ,  G09G2310/0264 ,  G09G2320/0223 ,  H01L27/124

Abstract: A display may have an array of pixels such as liquid crystal display pixels. The display may include short pixel rows that span only partially across the display and full-width pixel rows that span the width of the display. The gate lines coupled to the short pixel rows may extend into the inactive area of the display. Supplemental gate line loading structures may be located in the inactive area of the display to increase loading on the gate lines that are coupled to short pixel rows. The supplemental gate line loading structures may include data lines and doped polysilicon that overlap the gate lines in the inactive area. In displays that combine display and touch functionality into a thin-film transistor layer, supplemental loading structures may be used in the inactive area to increase loading on common voltage lines that are coupled to short rows of common voltage pads.

公开(公告)号：US20140232955A1

公开(公告)日：2014-08-21

申请号：US14174471

申请日：2014-02-06

Applicant: Apple Inc.

Inventor： Abbas Jamshidi Roudbari ,  Shih-Chang Chang ,  Ting-Kuo Chang ,  Cheng-Ho Yu

IPC: G06F3/041 ,  G02F1/1362

CPC classification number: G06F3/041 ,  G02F1/13338 ,  G02F1/13624 ,  G02F1/136286 ,  G02F2001/13606 ,  G06F3/0412 ,  G06F3/0416

Abstract: A touch screen display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. Each display pixel in the TFT layer may include first and second TFTs coupled in series between a data line and a storage capacitor. The first TFT may have a gate that is coupled to a gate line. The second TFT may have a gate that is coupled to a control line that is different than the gate line. A global enable signal may be provided on the control line, where the enable signal is asserted during display intervals and is deasserted during touch intervals. The second TFT may be formed using a top-gate TFT or a bottom-gate TFT arrangement.

Abstract translation: 触摸屏显示器可以具有滤色器层和薄膜晶体管层。 液晶材料层可以位于滤色器层和薄膜晶体管（TFT）层之间。 TFT层可以包括形成在玻璃基板的顶部的薄膜晶体管。 TFT层中的每个显示像素可以包括串联耦合在数据线和存储电容器之间的第一和第二TFT。 第一TFT可以具有耦合到栅极线的栅极。 第二TFT可以具有耦合到不同于栅极线的控制线的栅极。 可以在控制线上提供全局使能信号，其中在显示间隔期间使能信号被断言，并且在接触间隔期间被解除置位。 可以使用顶栅TFT或底栅TFT布置来形成第二TFT。

公开(公告)号：US12185616B1

公开(公告)日：2024-12-31

申请号：US17840472

申请日：2022-06-14

Applicant: Apple Inc.

Inventor： Ricardo A Peterson ,  Yuchi Che ,  Warren S Rieutort-Louis ,  Abbas Jamshidi Roudbari ,  Yi Qiao ,  Yue Cui ,  Jean-Pierre S Guillou ,  Shyuan Yang ,  Tsung-Ting Tsai

IPC: H10K59/88 ,  H10K59/35

Abstract: An electronic device may include a display and an optical sensor formed underneath the display. The display may have both a full pixel density region and a pixel removal region with a plurality of high-transmittance areas that overlap the optical sensor. To mitigate reflectance mismatch between the full pixel density region and the pixel removal region, the pixel removal region may include a transition region at one or more edges. In the transition region, one or more components may have a gradual density change between the full pixel density region and a central portion of the pixel removal region. Components that may have a changing density in the transition region include dummy thin-film transistor sub-pixels, dummy anodes, a cathode layer, and a touch sensor metal layer. The transition region may also include anodes that gradually change shape and/or size.

公开(公告)号：US20240332319A1

公开(公告)日：2024-10-03

申请号：US18613001

申请日：2024-03-21

Applicant: Apple Inc.

Inventor： Gihoon Choo ,  Abbas Jamshidi Roudbari ,  Guanxiong Liu ,  Jae Won Choi ,  Kyounghwan Kim ,  Shyuan Yang ,  Sungki Lee ,  Ting-Kuo Chang ,  Tsung-Ting Tsai ,  Wan-Ching Hsu ,  Warren S Rieutort-Louis ,  Yishan Liu ,  Zhe Hua

IPC: H01L27/12 ,  H01L25/16 ,  H01L25/18 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L27/1248 ,  H01L25/167 ,  H01L25/18 ,  H01L27/1259 ,  H01L23/4985 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L27/124 ,  H01L2224/16145 ,  H01L2224/32227 ,  H01L2224/73203 ,  H01L2924/1426

Abstract: An electronic device may include a substrate, an array of display pixels formed on the substrate, first conductive contacts on the substrate, second conductive contacts on the substrate, a flexible printed circuit that is attached to the first conductive contacts, a display driver integrated circuit that is attached to the second conductive contacts, and conductive traces that electrically connect the first conductive contacts to the second conductive contacts. A dielectric layer may cover at least the sidewalls of the conductive traces to protect the conductive traces from damage by an etchant. Subsequently, some or all of the dielectric layer may be removed to prevent damage caused by moisture ingress into the cladding layer.

公开(公告)号：US20240038159A1

公开(公告)日：2024-02-01

申请号：US18483282

申请日：2023-10-09

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shyuan Yang ,  Chuang Qian ,  Abbas Jamshidi Roudbari ,  Ting-Kuo Chang

IPC: G09G3/3225 ,  G09G3/3233

CPC classification number: G09G3/3225 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2310/061 ,  G09G2320/064 ,  G09G2320/0252 ,  G09G2320/0214 ,  G09G2320/0242 ,  G09G2320/0247 ,  G09G2300/0417 ,  G09G2300/043 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/06 ,  G09G2320/043 ,  G09G2320/045 ,  G09G2310/0297 ,  G09G2340/0435

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

公开(公告)号：US11854490B1

公开(公告)日：2023-12-26

申请号：US17879642

申请日：2022-08-02

Applicant: Apple Inc.

Inventor： Levent Erdal Aygun ,  Chin-Wei Lin ,  Yun Wang ,  Xin Lin ,  Aida R Colon-Berrios ,  Shih Chang Chang ,  Fan Gui ,  Mohammad Reza Esmaeili Rad ,  Ran Tu ,  Warren S Rieutort-Louis ,  Abbas Jamshidi Roudbari ,  Bhadrinarayana Lalgudi Visweswaran ,  Cheng-Chih Hsieh ,  Ricardo A Peterson ,  Shyuan Yang ,  Ting-Kuo Chang ,  Tsung-Ting Tsai ,  Yuchi Che

IPC: G09G3/3266 ,  G09G3/00 ,  H01L27/12

CPC classification number: G09G3/3266 ,  G09G3/007 ,  H01L27/124 ,  G09G2300/0452 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2320/0626 ,  G09G2330/021

Abstract: To reduce the amount of space occupied in the inactive area of a display by gate driver circuitry, at least a portion of the gate driver circuitry may be positioned in the active area of the display. To accommodate the gate driver circuitry, emissive sub-pixels may be laterally shifted relative to corresponding thin-film transistor sub-pixels. This allows for the thin-film transistor sub-pixels to be grouped adjacent to the central area of the active area, leaving room along an edge of the active area to accommodate one or more additional display components such as gate driver circuitry or fanout portions of data lines.

公开(公告)号：US11818912B2

公开(公告)日：2023-11-14

申请号：US16670071

申请日：2019-10-31

Applicant: Apple Inc.

Inventor： Tsung-Ting Tsai ,  Abbas Jamshidi Roudbari ,  Chuan-Sheng Wei ,  HanChi Ting ,  Jae Won Choi ,  Jianhong Lin ,  Nai-Chih Kao ,  Shih Chang Chang ,  Shin-Hung Yeh ,  Takahide Ishii ,  Ting-Kuo Chang ,  Yu Hung Chen ,  Yu-Wen Liu ,  Yu-Chuan Pai ,  Andrew Lin

IPC: H10K50/84 ,  H10K71/00 ,  H10K71/18 ,  H10K59/12 ,  H10K59/124

CPC classification number: H10K50/841 ,  H10K59/12 ,  H10K71/00 ,  H10K71/18 ,  H10K59/124 ,  H10K71/821

Abstract: A display may have organic light-emitting diode pixels formed from thin-film circuitry. The thin-film circuitry may be formed in thin-film transistor (TFT) layers and the organic light-emitting diodes may include anodes and cathodes and an organic emissive layer formed over the TFT layers between the anodes and cathodes. The organic emissive layer may be formed via chemical evaporation techniques. The display may include moisture blocking structures such as organic emissive layer disconnecting structures that introduce one or more gaps in the organic emissive layer during evaporation so that any potential moisture permeating path from the display panel edge to the active area of the display is completely terminated.

公开(公告)号：US11778874B2

公开(公告)日：2023-10-03

申请号：US17145815

申请日：2021-01-11

Applicant: Apple Inc.

Inventor： Warren S. Rieutort-Louis ,  Abbas Jamshidi Roudbari ,  Yuchi Che ,  Tsung-Ting Tsai ,  Jiun-Jye Chang ,  Shih Chang Chang ,  Ting-Kuo Chang

IPC: H10K59/131 ,  G09G3/3225 ,  G06F3/041 ,  H10K77/10

CPC classification number: H10K59/131 ,  G06F3/0412 ,  G09G3/3225 ,  H10K77/10

Abstract: An electronic device may include a display having display pixels formed in an active area of the display. The display further includes display driver circuitry for driving gate lines that are routed across the display. A hole such as a through hole, optical window, or other inactive region may be formed within the active area of the display. Multiple gate lines carrying the same signal may be merged together prior to being routed around the hole to help minimize the routing line congestion around the border of the hole. Dummy circuits may be coupled to the merged segment portion to help increase the parasitic loading on the merged segments. The hole may have a tapered shape to help maximize the size of the active area. The hole may have an asymmetric shape to accommodate multiple sub-display sensor components.

公开(公告)号：US20230092986A1

公开(公告)日：2023-03-23

申请号：US17802102

申请日：2021-02-02

Applicant: Apple Inc.

Inventor： Warren S. Rieutort-Louis ,  Meng-Huan Ho ,  Abbas Jamshidi Roudbari ,  Chih Jen Yang ,  Chin Wei Hsu ,  Jae Won Choi ,  Jean-Pierre S. Guillou ,  Ming Xu ,  Rui Liu ,  Yi Qiao ,  Yu-Wen Liu ,  Yuchi Che ,  Yue Cui

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/56

Abstract: An electronic device may include a display and an optical sensor formed underneath the display. A pixel removal region on the display may at least partially overlap with the sensor. The pixel removal region may include a plurality of non-pixel regions each of which is devoid of thin-film transistors. The plurality of non-pixel regions is configured to increase the transmittance of light through the display to the sensor. In addition to removing thin-film transistors in the pixel removal region, additional layers in the display stack-up may be removed. In particular, a cathode layer, polyimide layer, and/or substrate in the display stack-up may be patterned to have an opening in the pixel removal region. A polarizer may be bleached in the pixel removal region for additional transmittance gains. The cathode layer may be removed using laser ablation with a spot laser or blanket illumination.

公开(公告)号：US11251259B2

公开(公告)日：2022-02-15

申请号：US16939995

申请日：2020-07-27

Applicant: Apple Inc.

Inventor： Tiffany T. Moy ,  Yuchi Che ,  Seonpil Jang ,  Warren S. Rieutort-Louis ,  Bhadrinarayana Lalgudi Visweswaran ,  Jae Won Choi ,  Abbas Jamshidi Roudbari ,  Myung-Kwan Ryu ,  Hirokazu Yamagata ,  Keisuke Otsu

IPC: H01L27/32 ,  H01L51/00 ,  H01L51/52

Abstract: An organic light-emitting diode display may have rounded corners. A negative power supply path may be used to distribute a negative voltage to a cathode layer, while a positive power supply path may be used to distribute a positive power supply voltage to each pixel in the display. The positive power supply path may have a cutout that is occupied by the negative power supply path to decrease resistance of the negative power supply path in a rounded corner of the display. To mitigate reflections caused by the positive power supply path being formed over tightly spaced data lines, the positive power supply path may be omitted in a rounded corner of the display, a shielding layer may be formed over the positive power supply path in the rounded corner, or non-linear gate lines may be formed over the positive power supply path.