公开(公告)号：US20230024293A1

公开(公告)日：2023-01-26

申请号：US17383264

申请日：2021-07-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Yuan KUNG ,  Meng-Wei HSIEH

IPC: H03H9/05 ,  H03H9/10 ,  H03H9/54 ,  H05K3/34 ,  H01L23/552

Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.

公开(公告)号：US20220293538A1

公开(公告)日：2022-09-15

申请号：US17829119

申请日：2022-05-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Yuan KUNG ,  Hung-Yi LIN

IPC: H01L23/66 ,  H01L23/498 ,  H01L25/16 ,  H01L23/00 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package structure includes a redistribution structure and an impedance matching device. The redistribution structure includes a first surface, a second surface opposite to the first surface and a circuitless region extending from the first surface to the second surface. The impedance matching device is disposed on the redistribution structure and includes at least one impedance matching circuit aligned with the circuitless region.

公开(公告)号：US20220181267A1

公开(公告)日：2022-06-09

申请号：US17111347

申请日：2020-12-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Yuan KUNG ,  Meng-Wei HSIEH

IPC: H01L23/552 ,  H01L23/538 ,  H01L21/56 ,  H01L23/00

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes an electronic component, a conductive contact, and a first shielding layer. The electronic component has a first surface, a lateral surface angled with the first surface, and a second surface opposite to the first surface. The conductive contact is connected to the first surface of the electronic component. The first shielding layer is disposed on the lateral surface of the electronic component and a portion of the first surface of the electronic component. The first shielding layer contacts the conductive contact.

公开(公告)号：US20190393297A1

公开(公告)日：2019-12-26

申请号：US16447839

申请日：2019-06-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Yuan KUNG ,  Chien-Hua CHEN ,  Teck-Chong LEE ,  Hung-Yi LIN ,  Pao-Nan LEE ,  Hsin Hsiang WANG ,  Min-Tzu HSU ,  Po-Hao CHEN

IPC: H01L49/02 ,  H01L25/16 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A capacitor bank structure includes a plurality of capacitors, a protection material, a first dielectric layer and a plurality of first pillars. The capacitors are disposed side by side. Each of the capacitors has a first surface and a second surface opposite to the first surface, and includes a plurality of first electrodes and a plurality of second electrodes. The first electrodes are disposed adjacent to the first surface for external connection, and the second electrodes are disposed adjacent to the second surface for external connection. The protection material covers the capacitors, sidewalls of the first electrodes and sidewalls of the second electrodes, and has a first surface corresponding to the first surface of the capacitor and a second surface corresponding to the second surface of the capacitor. The first dielectric layer is disposed on the first surface of the protection material, and defines a plurality of openings to expose the first electrodes. The first pillars are disposed in the openings of the first dielectric layer and protrude from the first dielectric layer.

公开(公告)号：US20190055118A1

公开(公告)日：2019-02-21

申请号：US15680056

申请日：2017-08-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Hua CHEN ,  Cheng-Yuan KUNG ,  Che-Hau HUANG ,  Chin-Cheng KUO

IPC: B81B7/00 ,  B81C1/00

Abstract: A Micro Electro-Mechanical System (MEMS) device package includes a first circuit layer, a partition wall, a MEMS component, a second circuit layer and a polymeric dielectric layer. The partition wall is disposed over the first circuit layer. The MEMS component is disposed over the partition wall and electrically connected to the first circuit layer. The first circuit layer, the partition wall and the MEMS component enclose a space. The second circuit layer is disposed over and electrically connected to the first circuit layer. The polymeric dielectric layer is disposed between the first circuit layer and the second circuit layer.

公开(公告)号：US20180358291A1

公开(公告)日：2018-12-13

申请号：US15618085

申请日：2017-06-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Hua CHEN ,  Sheng-Chi HSIEH ,  Cheng-Yuan KUNG

IPC: H01L23/498 ,  H05K1/16 ,  H01L21/48 ,  H01L23/538

CPC classification number: H01L23/49827 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H05K1/162

Abstract: A method for manufacturing a semiconductor device package includes providing a substrate having a first surface and a second surface opposite to the first surface; disposing a passive component layer on the first surface of the substrate; after disposing the passive component layer, forming at least one via in the substrate, wherein the via penetrates the substrate and the passive component layer; and disposing a conductive layer on the passive component layer and filling the via with the conductive layer.

公开(公告)号：US20180247904A1

公开(公告)日：2018-08-30

申请号：US15442492

申请日：2017-02-24

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Sheng-Chi HSIEH ,  Hung-Yi LIN ,  Cheng-Yuan KUNG ,  Pao-Nan LEE ,  Chien-Hua CHEN

IPC: H01L23/66 ,  H03H1/00 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/642 ,  H01L23/645 ,  H01L2223/6616 ,  H01L2223/6672 ,  H03H3/02 ,  H03H3/08 ,  H03H9/0523 ,  H03H9/0557 ,  H03H9/1014 ,  H03H9/1071

Abstract: The present disclosure relates to a semiconductor package and a method of manufacturing the same. In some embodiments, a semiconductor package includes a substrate, at least one die, a sealing ring and an inductor. The at least one die is mounted on the substrate and includes a plurality of component structures operating with acoustic waves. The component structures are arranged on a side of the at least one die that faces the substrate. The sealing ring is disposed between the at least one die and the substrate and surrounds the component structures. The inductor is disposed in the substrate.