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    Temporary package, and method system for testing semiconductor dice having backside electrodes
    36.
    发明授权
    Temporary package, and method system for testing semiconductor dice having backside electrodes 失效
    用于测试具有背面电极的半导体裸片的临时封装和方法系统

    公开(公告)号：US6072323A

    公开(公告)日：2000-06-06

    申请号：US812098

    申请日：1997-03-03

    申请人： David R. Hembree ,  Salman Akram ,  Warren M. Farnworth ,  James M. Wark

    发明人： David R. Hembree ,  Salman Akram ,  Warren M. Farnworth ,  James M. Wark

    IPC分类号： G01R31/28 ,  G01R31/26

    CPC分类号： G01R31/2886

    摘要： A temporary package, a method, and a system for testing a semiconductor die having a backside electrode are provided. The temporary package includes a base for retaining the die; a conductive member for electrically contacting the backside electrode on the die; and terminal contacts in electrical communication with the conductive member. The package also includes a force applying mechanism for biasing the conductive member against the backside electrode. A conductive path between the conductive member and terminal contacts can be through a wire, or through the force applying mechanism. In an alternate embodiment the temporary package includes a base and terminal contacts formed in the configuration of a conventional semiconductor package. A cover for the base can include a metal, carbon filled elastomer, conductive foam, or conductive adhesive conductive member. The conductive member can be adapted to simultaneously contact the backside electrode on the die, and a mating contact on the base in electrical communication with the terminal contact. In addition, the conductive member can function as a heat sink for cooling the die during the test procedures.

    摘要翻译： 提供了一种用于测试具有背面电极的半导体管芯的临时封装，方法和系统。 临时包装包括用于保持模具的基座; 导电构件，用于电接触模具上的背面电极; 以及与导电构件电连通的端子触点。 封装还包括用于将导电构件偏压抵靠背侧电极的施力机构。 导电构件和端子触点之间的导电路径可以通过导线或通过施力机构。 在替代实施例中，临时封装包括以常规半导体封装的结构形成的基极和端子触点。 用于基座的盖可以包括金属，填充碳的弹性体，导电泡沫或导电粘合剂导电构件。 导电构件可以适于同时接触模具上的背面电极，以及基座上与端子触点电连通的配合触点。 此外，导电构件可以用作在测试过程中用于冷却模具的散热器。

    Hybrid interconnect and system for testing semiconductor dice
    39.
    发明授权
    Hybrid interconnect and system for testing semiconductor dice 失效

    公开(公告)号：US07049840B1

    公开(公告)日：2006-05-23

    申请号：US09302576

    申请日：1999-04-30

    申请人： David R. Hembree ,  Salman Akram ,  Warren M. Farnworth ,  Alan G. Wood ,  James M. Wark ,  Derek Gochnour

    发明人： David R. Hembree ,  Salman Akram ,  Warren M. Farnworth ,  Alan G. Wood ,  James M. Wark ,  Derek Gochnour

    IPC分类号： G01R31/02

    CPC分类号： G01R1/0466 ,  G01R1/0735

    摘要： An interconnect is provided for making electrical connections with a semiconductor die. The interconnect includes a substrate having integrally formed contact members, configured to electrically contact corresponding contact locations on the die. The interconnect also includes a pattern of conductors formed separately from the substrate, and then bonded to the substrate, in electrical communication with the contact members. The conductors can be mounted to a multi layered tape similar to TAB tape, or alternately bonded directly to the substrate. In addition, each conductor can include an opening aligned with a corresponding contact member, and filled with a conductive material, such as a conductive adhesive or solder. The conductive material electrically connects the contact members and conductors, and provides an expansion joint to allow expansion of the conductors without stressing the contact members. Also provided are a system for testing dice that includes the interconnect, and a system for testing wafers wherein the interconnect is formed as a probe card.

    Temporary package, method and system for testing semiconductor dice having backside electrodes
    40.
    发明授权
    Temporary package, method and system for testing semiconductor dice having backside electrodes 有权
    用于测试具有背面电极的半导体裸片的临时封装，方法和系统

    公开(公告)号：US6060894A

    公开(公告)日：2000-05-09

    申请号：US365676

    申请日：1999-08-02

    申请人： David R. Hembree ,  Salman Akram ,  Warren M. Farnworth ,  James M. Wark

    发明人： David R. Hembree ,  Salman Akram ,  Warren M. Farnworth ,  James M. Wark

    IPC分类号： G01R31/28 ,  G01R31/26

    CPC分类号： G01R31/2886

    摘要： A temporary package, a method, and a system for testing a semiconductor die having a backside electrode are provided. The temporary package includes a base for retaining the die; a conductive member for electrically contacting the backside electrode on the die; and terminal contacts in electrical communication with the conductive member. The package also includes a force applying mechanism for biasing the conductive member against the backside electrode. A conductive path between the conductive member and terminal contacts can be through a wire, or through the force applying mechanism. In an alternate embodiment the temporary package includes a base and terminal contacts formed in the configuration of a conventional semiconductor package. A cover for the base can include a metal, carbon filled elastomer, conductive foam, or conductive adhesive conductive member. The conductive member can be adapted to simultaneously contact the backside electrode on the die, and a mating contact on the base in electrical communication with the terminal contact. In addition, the conductive member can function as a heat sink for cooling the die during the test procedures.

    摘要翻译： 提供了一种用于测试具有背面电极的半导体管芯的临时封装，方法和系统。 临时包装包括用于保持模具的基座; 导电构件，用于电接触模具上的背面电极; 以及与导电构件电连通的端子触点。 封装还包括用于将导电构件偏压抵靠背侧电极的施力机构。 导电构件和端子触点之间的导电路径可以通过导线或通过施力机构。 在替代实施例中，临时封装包括以常规半导体封装的结构形成的基极和端子触点。 用于基座的盖可以包括金属，填充碳的弹性体，导电泡沫或导电粘合剂导电构件。 导电构件可以适于同时接触模具上的背面电极，以及基座上与端子触点电连通的配合触点。 此外，导电构件可以用作在测试过程中用于冷却模具的散热器。