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公开(公告)号：US20240427361A1
公开(公告)日：2024-12-26
申请号：US18340759
申请日：2023-06-23
Applicant: Apple Inc.
Inventor： Sechang Oh , Soheil Golara , Denis C. Daly , Seyedeh Sedigheh Hashemi , Mansour Keramat
Abstract: A voltage reference circuit included in a computer system includes an asymmetric amplifier circuit that includes two metal-oxide semiconductor field-effect transistors with different threshold voltages. The voltage reference circuit also includes an output circuit that generates, using a control signal, a bias signal and an output current that is used by a divider circuit to generate a reference voltage and a feedback voltage. The reference voltage and bias signal are used by the amplifier circuit to generate the control signal, which is based on a difference between the transistors' threshold voltages.
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公开(公告)号：US12013713B2
公开(公告)日：2024-06-18
申请号：US17033528
申请日：2020-09-25
Applicant: Apple Inc.
Inventor： Ali Mesgarani , Ke Yun , Seyedeh Sedigheh Hashemi , Jasdeep S. Dhaliwal , Mansour Keramat , Jafar Savoj , Bruno W. Garlepp , Vahid Majidzadeh Bafar , Emerson S. Fang
Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
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33.发明公开公开(公告)号：US20240168508A1
公开(公告)日：2024-05-23
申请号：US18493796
申请日：2023-10-24
Applicant: Apple Inc.
Inventor： Seyedeh Sedigheh Hashemi , Vahid Majidzadeh Bafar , Ali Mesgarani , Mansour Keramat
IPC: G05F3/26 , G05F3/20 , G11C5/14 , G11C11/4074
CPC classification number: G05F3/26 , G05F3/205 , G11C5/147 , G11C11/4074
Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.
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公开(公告)号：US11899061B2
公开(公告)日：2024-02-13
申请号：US17347284
申请日：2021-06-14
Applicant: Apple Inc.
Inventor： Fabien S. Faure , Si Chen , Mansour Keramat , Arnaud J. Forestier
CPC classification number: G01R31/31713 , G01R13/029 , G01R13/0272 , G01R19/2503 , G01R31/31705 , G06F11/10 , H03M1/12
Abstract: A voltage monitoring circuit is disclosed. An apparatus includes a first physical interface circuit and a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit. The real-time oscilloscope is configured to receive an indication that an error was detected in data transmitted from the first physical interface to a second physical interface circuit. The real-time oscilloscope is further configured to provide for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.
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公开(公告)号：US11581901B2
公开(公告)日：2023-02-14
申请号：US17027028
申请日：2020-09-21
Applicant: Apple Inc.
Inventor： Dusan Stepanovic , Mansour Keramat
Abstract: Systems, apparatuses, and methods for performing digital pre-distortion compensation of digital-to-analog converter non-linearity are described. A correction circuit receives a digital input word and couples a portion of the most significant bits (MSB's) of the digital input word to a correction lookup table (LUT). A correction value is retrieved from a correction LUT entry that matches the MSB's of the digital input word. Next, the correction value is added to the original digital input word in the digital domain. Then, the sum generated by adding the correction value to the original digital input word is optionally clipped if the sum exceeds the DAC core's input range. Next, the DAC core converts the sum into an analog value that is representative of the digital input word. The above approach helps to reduce non-linearities introduced by the DAC core in an energy-efficient manner by performing a correction in the digital domain.
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Patent Agency Ranking
公开(公告)号：US20220397604A1
公开(公告)日：2022-12-15
申请号：US17347284
申请日：2021-06-14
Applicant: Apple Inc.
Inventor： Fabien S. Faure , Si Chen , Mansour Keramat , Arnaud J. Forestier
IPC: G01R31/317 , H03M1/12 , G01R13/02 , G01R19/25 , G06F11/10
Abstract: A voltage monitoring circuit is disclosed. An apparatus includes a first physical interface circuit and a real-time oscilloscope circuit configured to monitor a first voltage provided to the first physical interface circuit. The real-time oscilloscope is configured to receive an indication that an error was detected in data transmitted from the first physical interface to a second physical interface circuit. The real-time oscilloscope is further configured to provide for debug, to a host computer external to the first interface, information indicating a state of the first voltage at a time at which the error was detected.
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公开(公告)号：US20220100220A1
公开(公告)日：2022-03-31
申请号：US17033528
申请日：2020-09-25
Applicant: Apple Inc.
Inventor： Ali Mesgarani , Ke Yun , Seyedeh Sedigheh Hashemi , Jasdeep S. Dhaliwal , Mansour Keramat , Jafar Savoj , Bruno W. Garlepp , Vahid Majidzadeh Bafar , Emerson S. Fang
Abstract: The present disclosure is directed to a system implementing a sensor. A sensing system is implemented in a functional circuit block that is coupled to a global supply voltage node. The sensing system includes a power converter circuit configured to generate a regulated voltage level on a local supply node using the voltage present on the global supply voltage node. The system also includes a sensor circuit coupled to receive the regulated voltage node, wherein the sensor is configured to compare corresponding parameters of different ones of a number of subset of device at a plurality of different time points and generate a plurality of comparison results. The comparisons generate an analog signal that is proportional to the operating parameter. An analog-to-digital converter (ADC) is coupled to receive the analog signal and generate a plurality of bits corresponding thereto.
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公开(公告)号：US11137787B1
公开(公告)日：2021-10-05
申请号：US17006680
申请日：2020-08-28
Applicant: Apple Inc.
Inventor： Soheil Golara , Mansour Keramat , Seyedeh Sedigheh Hashemi
Abstract: A comparator circuit included in a computer system employs an inverter circuit as a high-speed comparison circuit. To allow the inverter circuit to compare an input signal to a particular threshold value, a trip point of the inverter circuit is adjusted to match the threshold value by modifying a voltage level of a power supply node coupled to the inverter. To modify the voltage level of the power supply node, a replica of the inverter circuit is biased to generate a bias signal that corresponds to the trip point of the inverter circuit. A comparator circuit compares the bias signal to the threshold value, and adjusts the voltage level of the power supply node using results of the comparison. An output circuit adjusts an output of the inverter circuit to generate a full-rail output signal.
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39.发明授权公开(公告)号：US10928846B2
公开(公告)日：2021-02-23
申请号：US16288253
申请日：2019-02-28
Applicant: Apple Inc.
Inventor： Seyedeh Sedigheh Hashemi , Vahid Majidzadeh Bafar , Ali Mesgarani , Mansour Keramat
IPC: G05F3/26 , G05F3/20 , G11C5/14 , G11C11/4074
Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.
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40.发明申请公开(公告)号：US20200278713A1
公开(公告)日：2020-09-03
申请号：US16288253
申请日：2019-02-28
Applicant: Apple Inc.
Inventor： Seyedeh Sedigheh Hashemi , Vahid Majidzadeh Bafar , Ali Mesgarani , Mansour Keramat
IPC: G05F3/26 , G05F3/20 , G11C5/14 , G11C11/4074
Abstract: A power detect circuit is disclosed. A power detect circuit includes a voltage multiplier that receives an external supply voltage and generates a second supply voltage that is greater than the former. A voltage regulator is coupled to receive the second supply voltage and outputs a regulated supply voltage. A bandgap circuit is coupled to receive the second supply voltage when a first switch is closed, and the regulated supply voltage when a second switch is closed. The bandgap circuit generates a reference voltage for the voltage regulator, as well as one or more output voltages. A comparator circuit is coupled to receive the one or more output voltages from the bandgap circuit, and may compare these one or more output voltages to the regulated supply voltage.
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