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公开(公告)号:US20200312874A1
公开(公告)日:2020-10-01
申请号:US16833899
申请日:2020-03-30
IPC分类号: H01L27/11582 , H01L21/311 , H01L21/3205 , H01L21/02 , H01L21/3213 , H01L21/677
摘要: Methods of manufacturing memory devices are provided. The methods decrease the thickness of the first layers and increase the thickness of the second layers. Semiconductor devices are described having a film stack comprising alternating nitride and second layers in a first portion of the device, the alternating nitride and second layers of the film stack having a nitride:oxide thickness ratio (Nf:Of); and a memory stack comprising alternating word line and second layers in a second portion of the device, the alternating word line and second layers of the memory stack having a word line:oxide thickness ratio (Wm:Om), wherein 0.1(Wm:Om)
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公开(公告)号:US20200286897A1
公开(公告)日:2020-09-10
申请号:US16804226
申请日:2020-02-28
发明人: Priyadarshi Panda , Seshadri Ganguli , Sang Ho Yu , Sung-Kwan Kang , Gill Yong Lee , Sanjay Natarajan , Rajib Lochan Swain , Jorge Pablo Fernandez
IPC分类号: H01L27/108
摘要: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
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公开(公告)号:US10700072B2
公开(公告)日:2020-06-30
申请号:US16164236
申请日:2018-10-18
发明人: Priyadarshi Panda , Jianxin Lei , Wenting Hou , Mihaela Balseanu , Ning Li , Sanjay Natarajan , Gill Yong Lee , In Seok Hwang , Nobuyuki Sasaki , Sung-Kwan Kang
IPC分类号: H01L27/108 , H01L21/3213 , H01L21/033
摘要: Memory devices and methods of forming memory devices are described. The memory devices comprise a substrate with at least one film stack. The film stack comprises a polysilicon layer on the substrate; a bit line metal layer on the polysilicon layer; a cap layer on the bit line metal layer; and a hardmask on the cap layer. The memory device of some embodiments includes an optional barrier metal layer on the polysilicon layer and the bit line metal layer is on the barrier metal layer. Methods of forming electronic devices are described where one or more patterns are transferred through the films of the film stack to provide the bit line of a memory device.
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公开(公告)号:US20200126996A1
公开(公告)日:2020-04-23
申请号:US16164236
申请日:2018-10-18
发明人: Priyadarshi Panda , Jianxin Lei , Wenting Hou , Mihaela Baiseanu , Ning Li , Sanjay Natarajan , Gill Yong Lee , In Seok Hwang , Nobuyuki Sasaki , Sung-Kwan Kang
IPC分类号: H01L27/108 , H01L21/033 , H01L21/3213
摘要: Memory devices and methods of forming memory devices are described. The memory devices comprise a substrate with at least one film stack. The film stack comprises a polysilicon layer on the substrate; a bit line metal layer on the polysilicon layer; a cap layer on the bit line metal layer; and a hardmask on the cap layer. The memory device of some embodiments includes an optional barrier metal layer on the polysilicon layer and the bit line metal layer is on the barrier metal layer. Methods of forming electronic devices are described where one or more patterns are transferred through the films of the film stack to provide the bit line of a memory device.
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