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    Apparatus and method for reducing thermal interference in MR heads in disk drives
    31.
    发明授权
    Apparatus and method for reducing thermal interference in MR heads in disk drives 有权
    用于减少磁盘驱动器中MR磁头的热干扰的装置和方法

    公开(公告)号：US06473251B2

    公开(公告)日：2002-10-29

    申请号：US09398609

    申请日：1999-09-17

    Applicant: Giuseppe Patti ,  Gilles Denoyer ,  Roberto Alini

    Inventor： Giuseppe Patti ,  Gilles Denoyer ,  Roberto Alini

    IPC: G11B502

    CPC classification number: G11B5/012 ,  G11B2005/0016

    Abstract: An apparatus (and method) is provided that reduces thermal interference in the read signal of a disk drive. A variable or programmable resistance is used to change the transfer function of a filter in the read channel of the disk drive to filter the read signal. The filter has a first transfer function (first cut-off frequency) related to the programmed resistance during normal operation of the disk drive (i.e. when thermal interference is not detected). When thermal interference is detected in the read signal, the resistance is programmed to another value resulting in the filter having a second transfer function (second cut-off frequency). The resistance element includes a transconductance amplifier whose transconductance is variable or programmable to different values resulting in different programmable transfer functions (or one of a multitude of cut-off frequencies) for the filter. In the preferred embodiment, detection of thermal interference increases the cut-off frequency of the filter thereby filtering, or reducing the effects of, the thermal interference in the read signal.

    Abstract translation: 提供了减少磁盘驱动器的读取信号中的热干扰的装置（和方法）。 使用可变或可编​​程电阻来改变磁盘驱动器的读通道中的滤波器的传递函数，以过滤读取信号。 滤波器在磁盘驱动器的正常操作期间（即，当未检测到热干扰时）具有与编程电阻相关的第一传递函数（第一截止频率）。 当在读取信号中检测到热干扰时，电阻被编程为另一个值，导致滤波器具有第二传递函数（第二截止频率）。 电阻元件包括跨导放大器，其跨导是可变的或可编程为不同的值，导致滤波器的不同的可编程传递函数（或多个截止频率之一）。 在优选实施例中，热干扰的检测增加了滤波器的截止频率，从而过滤或减少了读取信号中的热干扰的影响。

    BiCMOS transconductor stage for high-frequency filters
    32.
    发明授权
    BiCMOS transconductor stage for high-frequency filters 失效
    BiCMOS跨导级高频滤波器

    公开(公告)号：US5912582A

    公开(公告)日：1999-06-15

    申请号：US866889

    申请日：1997-05-30

    Applicant: Valerio Pisati ,  Roberto Alini ,  Gaetano Cosentino ,  Gianfranco Vai

    Inventor： Valerio Pisati ,  Roberto Alini ,  Gaetano Cosentino ,  Gianfranco Vai

    IPC: H03F3/45 ,  H03F3/72 ,  H03B1/00 ,  H03K5/00 ,  H04B1/10

    CPC classification number: H03F3/72 ,  H03F3/45286 ,  H03F2203/45302 ,  H03F2203/45304 ,  H03F2203/45371 ,  H03F2203/45396 ,  H03F2203/45506

    Abstract: A BiCMOS transconductor differential stage for high frequency filters includes an input circuit portion having signal inputs and a pair of MOS transistors having their respective gate terminals corresponding to the signal inputs. The differential stage has an output circuit portion having signal outputs and a pair of bipolar transistors connected together with a common base inserted between the inputs and the outputs in a cascode configuration. The differential stage includes a switching device associated with at least one of the bipolar transistors to change the connections between parasitic capacitors present in the differential stage. The switching device also has at least one added bipolar transistor connected in a removable manner in parallel with the corresponding bipolar cascode transistor. In a variant differential stage, there are also provided respective added MOS transistors connected in parallel with the MOS transistors of the input circuit portion to change the ratio W:L of each of the MOS transistors.

    Abstract translation: 用于高频滤波器的BiCMOS跨导差分级包括具有信号输入的输入电路部分和具有对应于信号输入的各自的栅极端子的一对MOS晶体管。 差分级具有具有信号输出的输出电路部分和一对双极晶体管，它们以共模基极连接在共模基底上，该公共基极以共源共栅配置插入在输入端和输出端之间。 差分级包括与双极晶体管中的至少一个相关联的开关器件，以改变差分级中存在的寄生电容器之间的连接。 开关器件还具有至少一个加法双极晶体管，其以可移除的方式与相应的双极共源共栅晶体管并联连接。 在变异差分级中，还提供了与输入电路部分的MOS晶体管并联连接的各个附加的MOS晶体管，以改变每个MOS晶体管的比率W：L。

    One-time programmable circuit exploiting BJT hFE degradation
    36.
    发明申请
    One-time programmable circuit exploiting BJT hFE degradation 有权
    一次性可编程电路利用BJT hFE降解

    公开(公告)号：US20060262590A1

    公开(公告)日：2006-11-23

    申请号：US11115538

    申请日：2005-04-27

    Applicant: Roberto Alini ,  Sergio Rovati ,  Eric Vandenbossche ,  Christopher Paskins

    Inventor： Roberto Alini ,  Sergio Rovati ,  Eric Vandenbossche ,  Christopher Paskins

    IPC: G11C17/00

    CPC classification number: G11C17/16

    Abstract: A one-time programmable circuit uses forced BJT hFE degradation to permanently store digital information as a logic zero or logic one state. The forced degradation is accomplished by applying a voltage or current to the BJT for a specific time to the reversed biased base-emitter junction, allowing a significant degradation of the junction without destroying it.

    Abstract translation: 一次性可编程电路使用强制BJT低电平劣化将数字信息永久存储为逻辑0或逻辑1状态。 强制退化是通过向BJT施加一个特定时间的电压或电流到反向偏置的基极 - 发射极接点来实现的，从而允许接合处的显着劣化而不破坏它。

    Voltage regulator operable over a wide range of supply voltage
    37.
    发明授权
    Voltage regulator operable over a wide range of supply voltage 有权
    电压调节器可在宽范围的电源电压下工作

    公开(公告)号：US06963460B2

    公开(公告)日：2005-11-08

    申请号：US10295263

    申请日：2002-11-14

    Applicant: Manish Jain ,  Roberto Alini

    Inventor： Manish Jain ,  Roberto Alini

    IPC: G11B20/10 ,  G05F1/10 ,  G11B5/02 ,  G11B5/09 ,  G11B19/00

    CPC classification number: G11B19/00 ,  G11B19/2063

    Abstract: A voltage regulator includes an output node and first and second regulator circuits. The first regulator circuit generates a first regulated voltage on the output node when a supply voltage equals or exceeds a predetermined threshold, and the second regulator circuit generates a second regulated voltage on the output node when the supply voltage is less than the predetermined threshold.

    Abstract translation: 电压调节器包括输出节点和第一和第二调节器电路。 当电源电压等于或超过预定阈值时，第一调节器电路在输出节点上产生第一调节电压，并且当电源电压小于预定阈值时，第二调节器电路在输出节点上产生第二调节电压。

    Basic cell for programmable analog time-continuous filter
    39.
    发明授权
    Basic cell for programmable analog time-continuous filter 失效
    可编程模拟时间连续滤波器的基本单元

    公开(公告)号：US06359503B1

    公开(公告)日：2002-03-19

    申请号：US08999962

    申请日：1997-08-12

    Applicant: Roberto Alini ,  Francesco Brianti ,  Valerio Pisati ,  Marco Demicheli

    Inventor： Roberto Alini ,  Francesco Brianti ,  Valerio Pisati ,  Marco Demicheli

    IPC: H03K500

    CPC classification number: H03H15/00 ,  H02P6/21 ,  H03H11/0422

    Abstract: An elementary cell structure for programmable time-continuous analog filters and in particular for the processing of analog signals in read/write operations on magnetic supports comprises an amplifier stage provided with a pair of structurally identical transconductance half-cells connected together in a common circuit node. With a cascade of cells of this type is provided a time-continuous analog delay line which is used in a transverse time-continuous analog filter. This filter comprises a cascade of identical delay lines connected through multiplier nodes to a final summation node. “Elementary cell structure for programmable time-continuous analog filters and in particular for read/write operations on magnetic supports and associated analog filter”

    Abstract translation: 用于可编程时间连续模拟滤波器的基本单元结构，特别是用于在磁性支撑上的读取/写入操作中处理模拟信号的基本单元结构包括：放大器级，其设置有一对在公共电路节点中连接在一起的结构相同的跨导半电池 。 这种类型的单元级联提供了一种时间连续的模拟延迟线，其用于横向时间连续的模拟滤波器。 该滤波器包括通过乘法器节点连接到最终求和节点的相同延迟线级联。 “用于可编程时间连续模拟滤波器的基本单元结构，特别是用于磁性支持和相关模拟滤波器的读/写操作”

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