Distributed quality factor adjustment
    3.
    发明授权
    Distributed quality factor adjustment 有权
    分布式品质因素调整

    公开(公告)号:US09252723B2

    公开(公告)日:2016-02-02

    申请号:US14101722

    申请日:2013-12-10

    发明人: Ali Afsahi

    摘要: A system includes a differential circuit, multiple cross-coupled transconductance circuits. In some implementations, the differential circuit may include an inductor coil in a balun or transformer. The cross-coupled transconductance circuits may act to reduce the internal resistance of the differential circuit to increase the quality factor of the differential circuit. The cross-coupled transconductance circuit may be connected at differential points along the differential circuit and be engaged and disengaged to linearize the quality factor of the differential circuit.

    摘要翻译: 一种系统包括差分电路,多个交叉耦合跨导电路。 在一些实施方案中,差分电路可以包括平衡 - 不平衡转换器或变压器中的电感线圈。 交叉耦合跨导电路可以用于降低差分电路的内部电阻以增加差分电路的品质因数。 交叉耦合跨导电路可以沿着差分电路在差分点处连接并被接合和分离以使差分电路的品质因数线性化。

    Front-End Circuit of Low Supply-Voltage Memory Interface Receiver
    8.
    发明申请
    Front-End Circuit of Low Supply-Voltage Memory Interface Receiver 有权
    低电源电压存储器接口接收器的前端电路

    公开(公告)号:US20120249247A1

    公开(公告)日:2012-10-04

    申请号:US13077600

    申请日:2011-03-31

    申请人: Ying-Yu Hsu

    发明人: Ying-Yu Hsu

    IPC分类号: H03F3/04

    摘要: A circuit includes a reference voltage generator configured to generate a first reference voltage and a second reference voltage, wherein the first reference voltage is higher than a half of a positive power supply voltage, and the second reference voltage is lower than the half of the positive power supply voltage. An n-type differential amplifier includes a first and a second NMOS transistor, wherein a gate of the first NMOS transistor is coupled to an input node, and a gate of the second NMOS transistor is configured to receive the first reference voltage. A p-type differential amplifier is operated by the positive supply voltage and includes a first and a second PMOS transistor. A gate of the first PMOS transistor is coupled to the input node, and a gate of the second PMOS transistor is configured to receive the second reference voltage.

    摘要翻译: 电路包括:参考电压发生器,被配置为产生第一参考电压和第二参考电压,其中所述第一参考电压高于正电源电压的一半,并且所述第二参考电压低于所述正电压的一半 电源电压。 n型差分放大器包括第一和第二NMOS晶体管,其中第一NMOS晶体管的栅极耦合到输入节点,并且第二NMOS晶体管的栅极被配置为接收第一参考电压。 p型差分放大器由正电源电压工作,并且包括第一和第二PMOS晶体管。 第一PMOS晶体管的栅极耦合到输入节点,并且第二PMOS晶体管的栅极被配置为接收第二参考电压。

    APPARATUS AND METHOD FOR RECOVERY OF WASTED POWER FROM DIFFERENTIAL DRIVERS
    10.
    发明申请
    APPARATUS AND METHOD FOR RECOVERY OF WASTED POWER FROM DIFFERENTIAL DRIVERS 有权
    从差异驱动器恢复废弃电力的装置和方法

    公开(公告)号:US20120007664A1

    公开(公告)日:2012-01-12

    申请号:US13237779

    申请日:2011-09-20

    申请人: Hongwu Chi

    发明人: Hongwu Chi

    IPC分类号: G05F1/10

    摘要: An apparatus and method for supplying power to circuits of an integrated circuit (IC) from the wasted power in low-swing high-speed differential line drivers used in the IC, is disclosed. In a high speed line driver the load resistors of the driver are connected to a power supply, either the local power supply or the receiver power supply. DC power for the driver is supplied through these resistors. A large portion of this power, supplied from the power supply is wasted in the DC set-up circuit of the differential line driver. It is proposed to use this wasted power to power selected circuits of an IC. The use of this wasted power from the drivers for powering the circuits reduces the overall power dissipation of the system.

    摘要翻译: 公开了一种用于在IC中使用的低挥发性高速差分线路驱动器中从浪费的电力向集成电路(IC)的电路供电的装置和方法。 在高速线路驱动器中,驱动器的负载电阻连接到电源,本地电源或接收器电源。 通过这些电阻提供驱动器的直流电源。 从电源供应的大部分功率被浪费在差分线路驱动器的DC设置电路中。 建议使用这种浪费的功率为IC的所选电路供电。 使用来自驱动器的这种浪费的功率为电路供电,降低了系统的总功耗。