公开(公告)号：US5352912A

公开(公告)日：1994-10-04

申请号：US792493

申请日：1991-11-13

申请人： Emmanuel F. Crabbe ,  David L. Harame ,  Bernard S. Meyerson ,  Gary Patton ,  Johannes M. C. Stork

发明人： Emmanuel F. Crabbe ,  David L. Harame ,  Bernard S. Meyerson ,  Gary Patton ,  Johannes M. C. Stork

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L29/165 ,  H01L29/737 ,  H01L29/161 ,  H01L29/72

CPC分类号： H01L29/7378 ,  H01L29/737 ,  Y10S438/936

摘要： A heterojunction bipolar transistor having a single-crystal emitter with reduced charge storage and acceptable current gain is described herein. The heterojunction transistor comprises a collector region, a base region formed on the collector region, and a single-crystal emitter region grown on the base region by low temperature epitaxy. During the formation of the base region, a graded profile of 5-23% germanium is added to the base, as the distance to the collector region decreases, thereby decreasing the base bandgap as it approaches the collector region. Further, during the formation of the emitter region, a graded profile of 0-20% germanium is added to the emitter as the distance from the emitter-base junction increases. Thus, the emitter bandgap decreases as it moves farther from the emitter-base junction. The result of the above grading profiles is that the emitter bandgap is narrower at the emitter contact than the base bandgap at the emitter-base junction.

摘要翻译： 本文描述了具有具有降低的电荷存储和可接受的电流增益的单晶发射极的异质结双极晶体管。 异质结晶体管包括集电极区域，形成在集电极区域上的基极区域和通过低温外延生长在基极区域上的单晶发射极区域。 在形成基极区域时，随着到集电极区域的距离减小，5-23％的锗的梯度分布被添加到基极中，从而随着接近集电极区域而减小基带隙。 此外，在形成发射极区域期间，随着与发射极 - 基极结的距离增加，0-20％锗的梯度轮廓被添加到发射极。 因此，发射极带隙随着与发射极 - 基极结更远地移动而减小。 上述分级曲线的结果是，在发射极接触处的发射极带隙比发射极 - 基极结处的基极带隙更窄。

公开(公告)号：US5316958A

公开(公告)日：1994-05-31

申请号：US531218

申请日：1990-05-31

申请人： Bernard S. Meyerson

发明人： Bernard S. Meyerson

IPC分类号： H01L21/205 ,  H01L21/22 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737 ,  H01L21/20 ,  H01L21/265

CPC分类号： H01L21/02532 ,  H01L21/02576 ,  H01L21/0262 ,  H01L21/22 ,  Y10S438/925

摘要： An in-situ doped n-type silicon layer is provided by a low temperature, low pressure chemical vapor deposition process employing a germanium-containing gas in combination with the n-type dopant containing gas to thereby enhance the in-situ incorporation of the n-type dopant into the silicon layer as an electronically active dopant. Also provided are a silicon layer including a P-N junction wherein the layer contains an n-type dopant and germanium, and devices such as transistors incorporating an in-situ n-doped silicon layer.

摘要翻译： 通过采用含锗气体与含n型掺杂剂气体组合的低温，低压化学气相沉积方法提供了原位掺杂的n型硅层，从而增强了原位掺杂的n型硅层 型掺杂剂作为电子活性掺杂剂进入硅层。 还提供了包括P-N结的硅层，其中该层包含n型掺杂剂和锗，以及诸如并入现场n掺杂硅层的晶体管的器件。

公开(公告)号：US5246884A

公开(公告)日：1993-09-21

申请号：US784280

申请日：1991-10-30

申请人： Mark A. Jaso ,  Paul B. Jones ,  Bernard S. Meyerson ,  Vishnubhai V. Patel

发明人： Mark A. Jaso ,  Paul B. Jones ,  Bernard S. Meyerson ,  Vishnubhai V. Patel

IPC分类号： H01L21/304 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/768

CPC分类号： H01L21/31053 ,  H01L21/76819

摘要： Metallized semiconductor chips, such as are intended for VLSI, are coated with a first layer of SiO2 followed by a second layer of CVD diamond or DLC as an etch stop. The resulting structure is reproducibly and controllably planarized using a chem-mech slurry and an appropriate polishing pad, enabling subsequent layers to be built up similarly.

公开(公告)号：US5119157A

公开(公告)日：1992-06-02

申请号：US664681

申请日：1991-03-05

申请人： David L. Harame ,  Bernard S. Meyerson ,  Johannes M. C. Stork

发明人： David L. Harame ,  Bernard S. Meyerson ,  Johannes M. C. Stork

IPC分类号： H01L21/20 ,  H01L21/74 ,  H01L21/8228 ,  H01L21/8238 ,  H01L27/06 ,  H01L29/08

CPC分类号： H01L29/0821 ,  H01L21/743 ,  H01L21/82285 ,  H01L21/8238 ,  H01L27/0623

摘要： A P- semiconductor material substrate which has been ion-implanted with N-type dopants to form an N+ subcollector layer is annealed in Argon to further remove implant damage and drive the dopant ions deeper into the P substrate. Next a lightly doped N- epitaxial layer is grown on the N+ subcollector layer. This forms the blanket collector. A P- well region is formed by growing a pad oxide of 10 nm on the N-epi layer and a 200 nm layer of nitride is then deposited on top of the layer oxide. A photoresist etch mask is used to pattern the P- well region. A reactive ion etch is performed through the dielectric oxide and nitride layers, through the epitaxial layer and stopping in the subcollector layer. A layer of low temperature expitaxial material is grown over the structure using ultra-high vacuum/chemical vapor depositions such that the epitaxial layer extends above the surface of the epitaxial layer and includes a P+ heavily doped layer and a lightly P-doped surface layer. The heavily doped P+ layer provides the low resistance contact to the collector region and the lightly doped P-layer is the collector region and its thickness is determined by the diffusion of the heavily doped layer during the entire process.

摘要翻译： 已经用N型掺杂剂离子注入以形成N +子集电极层的P-半导体材料衬底在氩气中退火以进一步消除注入损伤并且将掺杂剂离子更深地驱动到P衬底中。 接下来，在N +子集电极层上生长轻掺杂的N外延层。 这形成了毯子收集器。 通过在N外延层上生长10nm的衬垫氧化物形成P-阱区，然后在层氧化物的顶部上沉积200nm的氮化物层。 使用光致抗蚀剂蚀刻掩模来图案化P-阱区域。 通过电介质氧化物层和氮化物层通过外延层进行反应离子蚀刻，并在子集电极层中停止。 使用超高真空/化学气相沉积在结构上生长一层低温外延材料，使得外延层在外延层的表面上延伸，并且包括P +重掺杂层和轻掺杂P掺杂表面层。 重掺杂的P +层向集电极区提供低电阻接触，轻掺杂的P层是集电极区，其厚度由整个工艺中重掺杂层的扩散决定。

公开(公告)号：US5057450A

公开(公告)日：1991-10-15

申请号：US678390

申请日：1991-04-01

申请人： Gary B. Bronner ,  Paul M. Fahey ,  Bernard S. Meyerson ,  Wilbur D. Pricer

发明人： Gary B. Bronner ,  Paul M. Fahey ,  Bernard S. Meyerson ,  Wilbur D. Pricer

IPC分类号： H01L21/762 ,  H01L21/306 ,  H01L21/308 ,  H01L21/763 ,  H01L21/764 ,  H01L27/12

CPC分类号： H01L21/3083 ,  H01L21/30604 ,  H01L21/763 ,  H01L21/764 ,  H01L21/76264 ,  H01L21/76289 ,  Y10S148/135

摘要： A fabrication method for forming SOI structures where perfect material is grown epitaxially on a substrate and then, through a series of selective etches and oxidations, an insulating layer is formed below the epitaxial silicon. In the method, low temperature epitaxial techniques are employed to grow a layered structure including a first layer p++ silicon on a substrate wafer, a layer of intrinsic silicon is then formed on the first p++ silicon layer, and a second layer of p++ silicon is formed on the intrinsic silicon layer, and a finally a layer of p-silicon is fabricated on top of the second p++ silicon layer. Grooves are formed through the p-layer, the second p++ silicon layer, the intrinsic silicon layer, and stopped in the first p++ silicon layer. An etch is then employed to remove the intrinsic layer long enough for the p++ silicon layer to be totally undercut, leaving an air gap between the two p++ silicon layers. An oxidation step is then performed to form a bottom insulator consisting of the oxidized first p++ silicon layer and on an upper insulator consisting of the oxidized second p++ silicon layer.

公开(公告)号：US4436797A

公开(公告)日：1984-03-13

申请号：US394018

申请日：1982-06-30

申请人： Michael J. Brady ,  Bernard S. Meyerson ,  John M. Warlaumont

发明人： Michael J. Brady ,  Bernard S. Meyerson ,  John M. Warlaumont

IPC分类号： C01B33/02 ,  G03F1/22 ,  H01L21/027 ,  F24F13/00 ,  B05B5/00 ,  B32B9/00 ,  C23C15/00

CPC分类号： G03F1/22 ,  Y10S430/168 ,  Y10T428/30

摘要： An improved X-ray lithography mask has been fabricated by forming an X-ray absorbing lithography pattern on a supporting foil of hydrogenated amorphous carbon. The substrate foil is formed by depositing a carbon film in the presence of hydrogen onto a surface having a temperature below 375.degree. C. The hydrogen concentration is maintained sufficiently high that the resulting film has at least one atom percent of hydrogen. A film having about 20 atom percent of hydrogen is preferred. While impurities are permitted, impurities must be maintained at a level such that the optical bandgap of the resulting film is at least one electron volt. A film with an optical bandgap of about 2 electron volts is preferred.

摘要翻译： 已经通过在氢化无定形碳的支撑箔上形成X射线吸收光刻图案来制造改进的X射线光刻掩模。 通过在氢存在下将碳膜沉积到温度低于375℃的表面上形成衬底箔。氢气的浓度保持足够高，使得所得膜具有至少一个原子百分比的氢。 优选具有约20原子％氢的膜。 虽然允许杂质，但是杂质必须保持在使得所得膜的光学带隙至少为一个电子伏特的水平。 具有约2电子伏特的光学带隙的膜是优选的。