公开(公告)号：US07566525B2

公开(公告)日：2009-07-28

申请号：US11152559

申请日：2005-06-14

Applicant: Chin-Hsiang Lin ,  Ching-Yu Chang

Inventor： Chin-Hsiang Lin ,  Ching-Yu Chang

IPC: G03F1/00 ,  H01L21/00

CPC classification number: G03F7/405

Abstract: A method is disclosed for forming a photoresist pattern with enhanced etch resistance on a semiconductor substrate. A photoresist pattern is first formed on the substrate. A silicon-containing polymer layer is deposited over the photoresist pattern on the substrate. A thermal treatment is performed to form a cross-linked anti-etch shielding layer between the photoresist pattern and the silicon-containing layer. Then, the remaining silicon containing layer is removed. A plasma treatment is performed in order to increase an etch resistance of the cross-linked anti-etch shielding layer and the photoresist pattern.

Abstract translation: 公开了用于在半导体衬底上形成具有增强的耐蚀刻性的光致抗蚀剂图案的方法。 首先在基板上形成光致抗蚀剂图案。 在基板上的光致抗蚀剂图案上沉积含硅聚合物层。 进行热处理以在光致抗蚀剂图案和含硅层之间形成交联的抗蚀刻屏蔽层。 然后，除去剩余的含硅层。 执行等离子体处理以增加交联的抗蚀刻屏蔽层和光刻胶图案的耐蚀刻性。

公开(公告)号：US20080158451A1

公开(公告)日：2008-07-03

申请号：US12004180

申请日：2007-12-20

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G02F1/13363 ,  G02F1/1333

CPC classification number: G02F1/1393 ,  G02F1/13363 ,  G02F1/133707 ,  G02F2001/133638 ,  G02F2413/04 ,  G02F2413/06

Abstract: Systems for displaying images are provided. A representative system comprises a dual domain electrical compensated birefringence liquid crystal display (ECB-LCD) panel. A pair of uniaxial 1/4λ compensation films is separately disposed on both outer surfaces of the dual domain ECB-LCD panel. A pair of uniaxial 1/2λ compensation films is separately disposed on outer surfaces of the pair of uniaxial 1/4λ compensation films. A pair of polarizers is separately disposed on both outer surfaces of the pair of the uniaxial 1/2λ optical compensation films.

Abstract translation: 提供显示图像的系统。 代表性的系统包括双域电补偿双折射液晶显示器（ECB-LCD）面板。 一对单轴1 /4λ补偿膜分别设置在双域ECB-LCD面板的两个外表面上。 一对单轴1 /2λ补偿膜分别设置在该对单轴1/4波导补偿膜的外表面上。 一对偏振器分别设置在该对单轴1/2波长光学补偿膜的两个外表面上。

公开(公告)号：US20070254244A1

公开(公告)日：2007-11-01

申请号：US11416264

申请日：2006-05-01

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: G03F7/26

CPC classification number: G03F7/0035 ,  G03F7/095 ,  G03F7/0955 ,  G03F7/38

Abstract: The present invention includes a method of forming a resist structure comprising depositing a first photoresist material over a first layer. Selectively exposing portions of the first layer to light to provide exposed portions and unexposed portions in the first photoresist layer. Without developing the first photoresist layer, depositing a second photoresist layer over the first photoresist layer including both exposed portions and unexposed portions. The second photoresist layer being capable of crosslinking in the presence of an acid. Treating the first photoresist layer to cause an acid from only one of the exposed portions or unexposed portions of the first photoresist layer producing a plurality of crosslinked portions of the second photoresist layer. Thereafter, developing the second photoresist layer to remove uncrosslinked portions.

Abstract translation: 本发明包括形成抗蚀剂结构的方法，包括在第一层上沉积第一光致抗蚀剂材料。 将第一层的部分选择性地曝光以在第一光致抗蚀剂层中提供暴露部分和未曝光部分。 在不显影第一光致抗蚀剂层的情况下，在包括两个曝光部分和未曝光部分的第一光刻胶层上沉积第二光致抗蚀剂层。 第二光致抗蚀剂层能够在酸的存在下交联。 处理第一光致抗蚀剂层以仅产生来自第一光致抗蚀剂层的暴露部分中的一个或未曝光部分的酸，产生第二光致抗蚀剂层的多个交联部分。 此后，显影第二光致抗蚀剂层以去除未交联的部分。

公开(公告)号：US20070093067A1

公开(公告)日：2007-04-26

申请号：US11256711

申请日：2005-10-24

Applicant: Ching-Yu Chang ,  Burn Lin

Inventor： Ching-Yu Chang ,  Burn Lin

IPC: H01L21/302 ,  H01L21/461

CPC classification number: H01L21/67046 ,  H01L21/67051 ,  H01L21/6708

Abstract: A method of processing a semiconductor wafer can be used prior to an immersion lithography process. The method includes providing a layer of organic photoresist onto a surface of the semiconductor wafer and removing a portion of the photoresist from an outer edge of the wafer using an edge-bead removal process. The outer edge of the wafer is then cleaned using one or more processes, including a mechanical scrubber/cleaner, mega-sonic power, de-ionized water and/or chemical solution.

Abstract translation: 在浸没光刻工艺之前可以使用半导体晶片的处理方法。 该方法包括在半导体晶片的表面上提供一层有机光致抗蚀剂，并使用边缘珠去除工艺从晶片的外边缘去除一部分光致抗蚀剂。 然后使用一个或多个工艺（包括机械洗涤器/清洁器，超声功率，去离子水和/或化学溶液）清洁晶片的外边缘。

公开(公告)号：US20070069399A1

公开(公告)日：2007-03-29

申请号：US11309166

申请日：2006-07-05

Applicant: Ching-Yu Chang

Inventor： Ching-Yu Chang

IPC: H01L23/544

CPC classification number: H01L23/544 ,  H01L2223/54453 ,  H01L2924/0002 ,  Y10S438/975 ,  H01L2924/00

Abstract: An overlay mark is provided. A first material layer is formed on a substrate, and then a first trench serving as a trench type outer mark is formed in the first material layer. The first trench is partially filled with the first deposition layer. A second material is formed over the first trench and the first deposition layer. A second trench is formed exposing the first deposition layer within the first trench. The second trench is partially filled with a second deposition layer forming a third trench. A third material layer is formed on the substrate to cover the second deposition layer and the second material layer. A step height is formed on the third deposition layer between the edge of the first trench and the center of the first trench. A raised feature serving as an inner mark is formed on the third deposition layer.

Abstract translation: 提供重叠标记。 在基板上形成第一材料层，然后在第一材料层中形成用作沟槽型外标的第一沟槽。 第一沟槽部分地填充有第一沉积层。 在第一沟槽和第一沉积层上形成第二材料。 形成第二沟槽，使第一沉积层暴露在第一沟槽内。 第二沟槽部分地填充有形成第三沟槽的第二沉积层。 在基板上形成第三材料层以覆盖第二沉积层和第二材料层。 在第一沉积层的边缘和第一沟槽的中心之间的第三沉积层上形成台阶高度。 在第三沉积层上形成用作内标的凸起特征。

公开(公告)号：US20070003879A1

公开(公告)日：2007-01-04

申请号：US11337986

申请日：2006-01-24

Applicant: Ching-Yu Chang ,  C.C. Ke ,  Vincent Yu

Inventor： Ching-Yu Chang ,  C.C. Ke ,  Vincent Yu

IPC: G03F7/26

CPC classification number: G03F7/2041 ,  G03F7/162 ,  G03F7/168 ,  G03F7/70341 ,  H01L21/67051 ,  H01L21/6708 ,  H01L21/6715

Abstract: A method of performing immersion lithography on a semiconductor wafer is provided. The method includes providing a layer of resist onto a surface of the semiconductor wafer. Next, an edge-bead removal process spins the wafer at a speed greater than 1000 revolutions per minute and dispenses solvent through a nozzle while the wafer is spinning. Then, the resist layer is exposed using an immersion lithography exposure system.

Abstract translation: 提供了在半导体晶片上进行浸渍光刻的方法。 该方法包括在半导体晶片的表面上提供一层抗蚀剂。 接下来，边缘珠去除过程以大于1000转/分钟的速度旋转晶片，并且在晶片旋转时通过喷嘴分配溶剂。 然后，使用浸没式光刻曝光系统曝光抗蚀剂层。

公开(公告)号：US20060141399A1

公开(公告)日：2006-06-29

申请号：US11025538

申请日：2004-12-29

Applicant: Ching-Yu Chang ,  Burn Lin ,  Chi-Wen Liu

Inventor： Ching-Yu Chang ,  Burn Lin ,  Chi-Wen Liu

IPC: G03F7/00

CPC classification number: G03F7/322

Abstract: A method of creating a resist image on a semiconductor substrate includes exposing a layer of photoresist on the semiconductor substrate and developing the exposed layer of photoresist using a first fluid including supercritical carbon dioxide and a base such as Tetra-Methyl Ammonium Hydroxide (TMAH). Additionally, the developed photoresist can be cleaned using a second fluid including supercritical carbon dioxide and a solvent such as methanol, ethanol, isopropanol, and xylene.

公开(公告)号：US20060115774A1

公开(公告)日：2006-06-01

申请号：US10999625

申请日：2004-11-30

Applicant: Yu-Hsi Wang ,  Shi-Che Wang ,  Hua-Tal Lin ,  Shang Ho Lin ,  Ching-Yu Chang ,  Chin-Hsiang Lin

Inventor： Yu-Hsi Wang ,  Shi-Che Wang ,  Hua-Tal Lin ,  Shang Ho Lin ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/00

CPC classification number: G03F7/405 ,  H01L21/02057

Abstract: A novel method for eliminating or reducing the accumulation of electrostatic charges on semiconductor wafers during spin-rinse-drying of the wafers is disclosed. The method includes rinsing a wafer; applying an ionic solution to the wafer; and spin-drying the wafer. During the spin-drying step, the ionic solution neutralizes electrostatic charges on the wafer as the wafer is rotated. This reduces the formation of defects in devices fabricated on the wafer, as well as prevents or reduces electrostatic interference with processing equipment during photolithographic and other fabrication processes.

Abstract translation: 公开了一种用于在晶片的旋转冲洗干燥期间消除或减少半导体晶片上的静电电荷累积的新颖方法。 该方法包括冲洗晶片; 将离子溶液施加到晶片上; 并旋转晶片。 在旋转干燥步骤期间，当晶片旋转时，离子溶液中和晶片上的静电电荷。 这减少了在晶片上制造的器件中的缺陷的形成，以及在光刻和其它制造工艺期间防止或减少与处理设备的静电干扰。

公开(公告)号：US06998316B2

公开(公告)日：2006-02-14

申请号：US10708228

申请日：2004-02-18

Applicant: Tahorng Yang ,  Henry Chung ,  Cheng-Chen Calvin Hsueh ,  Ching-Yu Chang

Inventor： Tahorng Yang ,  Henry Chung ,  Cheng-Chen Calvin Hsueh ,  Ching-Yu Chang

IPC: H01L21/8236 ,  H01L21/336 ,  H01L21/31 ,  H01L21/469

CPC classification number: H01L27/1126 ,  H01L27/105 ,  H01L27/11293 ,  Y10S438/949

Abstract: A fabrication method for a read only memory provides a substrate having a memory cell region and a periphery circuit region. A memory cell region has a memory cell array and the periphery circuit region has transistors. A precise layer having a plurality of first openings is formed in the memory cell region. The first openings are above the channel region of each memory cell in the memory cell array and the critical dimension of the first openings is identical. A mask layer having second openings and third openings is formed on the substrate. The second openings locate over a pre-coding memory cell region, and the third openings locate over the transistor gates. An ion implantation is performed to code the memory cell in the pre-coding memory cell region and to adjust the threshold voltage of the transistor, using the precise layer and the mask layer as a mask.

Abstract translation: 只读存储器的制造方法提供具有存储单元区域和外围电路区域的衬底。 存储单元区域具有存储单元阵列，并且外围电路区域具有晶体管。 在存储单元区域中形成具有多个第一开口的精确层。 第一开口在存储单元阵列中的每个存储单元的沟道区之上，并且第一开口的临界尺寸相同。 在基板上形成具有第二开口和第三开口的掩模层。 第二开口位于预编码存储单元区域上，并且第三开口位于晶体管栅极之上。 执行离子注入以对预编码存储单元区域中的存储单元进行编码，并使用精确层和掩模层作为掩模来调节晶体管的阈值电压。

公开(公告)号：US06960411B2

公开(公告)日：2005-11-01

申请号：US10314959

申请日：2002-12-10

Applicant: Yu-Lin Yen ,  Ching-Yu Chang ,  Shun-Li Lin

Inventor： Yu-Lin Yen ,  Ching-Yu Chang ,  Shun-Li Lin

IPC: G03F1/00 ,  G03F1/36 ,  H01L21/762 ,  G03F9/00

CPC classification number: G03F1/36 ,  H01L21/76224

Abstract: A mask with extended mask window for forming patterns on a semiconductor substrate. The mask includes a main chip array having four sides for forming patterns of a main chip in a semiconductor substrate and a plurality of extended mask windows arranged around the main chip array. A method of dummy exposure using the mask includes providing a semiconductor substrate comprising a nitride layer with a plurality of main chip areas therein, and a plurality of unpatterned areas therein, forming a resist layer on the semiconductor substrate, providing an exposure mask comprising a main chip array and a plurality of extended mask windows, patterning the main chip areas of the semiconductor substrate using the main chip array of the exposure mask, patterning the unpatterned areas of the semiconductor substrate using the windows of the exposure mask, and removing the unexposed portions of the resist layer.

Abstract translation: 具有用于在半导体衬底上形成图案的扩展掩模窗口的掩模。 掩模包括具有用于形成半导体衬底中的主芯片的图案的四个侧面的主芯片阵列和布置在主芯片阵列周围的多个扩展掩模窗口。 使用掩模的伪曝光方法包括提供包括其中具有多个主芯片区域的氮化物层和其中多个未图案化区域的半导体衬底，在半导体衬底上形成抗蚀剂层，提供包括主体的曝光掩模 芯片阵列和多个扩展掩模窗口，使用曝光掩模的主芯片阵列图案化半导体衬底的主芯片区域，使用曝光掩模的窗口对半导体衬底的未图案化区域进行图案化，以及去除未曝光部分 的抗蚀剂层。