公开(公告)号：US5331197A

公开(公告)日：1994-07-19

申请号：US870258

申请日：1992-04-17

申请人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

发明人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L27/102 ,  H01L27/108 ,  H01L27/115 ,  H01L29/423 ,  H01L29/786 ,  H01L29/78

CPC分类号： H01L29/7851 ,  H01L21/823475 ,  H01L27/1026 ,  H01L27/10805 ,  H01L27/115 ,  H01L29/66795

摘要： A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

摘要翻译： 一种半导体存储器件，包括：绝缘栅晶体管，具有沿着基板的主表面设置的多个主电极区域和设置在所述多个主电极区域之间的沟道区域;以及栅极电极，设置在所述沟道区域上， 绝缘体之间，所述栅电极具有至少两个相对的部分; 以及设置在所述主电极区域之一上的电可破坏的存储元件。

公开(公告)号：US5192680A

公开(公告)日：1993-03-09

申请号：US360341

申请日：1989-06-02

申请人： Yasuhiro Naruse ,  Genzo Momma ,  Hiroshi Yuzurihara

发明人： Yasuhiro Naruse ,  Genzo Momma ,  Hiroshi Yuzurihara

IPC分类号： H01L21/205 ,  H01L21/027 ,  H01L21/20 ,  H01L21/30

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/0262 ,  Y10S438/975

摘要： A method for producing a semiconductor device containing steps of forming a stepped pattern on the surface of a semiconductor substrate and forming a gaseous grown crystal layer thereon, which comprises positioning an alignment pattern (for example 6c) included in the first-mentioned pattern diagonally with respect to an in-plane direction of faster pattern growth in said gaseous crystal growth.

摘要翻译： 一种用于制造半导体器件的方法，包括在半导体衬底的表面上形成阶梯状图案并在其上形成气态生长晶体层的步骤，其包括将包括在第一提到的图案中的对准图案（例如6c）与对角线对准地定位 相对于所述气态晶体生长中更快图案生长的面内方向。

公开(公告)号：US07709780B2

公开(公告)日：2010-05-04

申请号：US12111342

申请日：2008-04-29

申请人： Shunsuke Inoue ,  Hiroshi Yuzurihara ,  Tetsuya Itano

发明人： Shunsuke Inoue ,  Hiroshi Yuzurihara ,  Tetsuya Itano

IPC分类号： H01L31/00

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/1462

摘要： A photoelectric conversion device is configured to include a light receiving region, for converting light to signal charges, and transistors. An insulation film is arranged on a surface of the light receiving region and under gate electrodes of the transistors. A first reflection prevention film of a refractive index higher than that of the insulation film is arranged at least above the light receiving region, to sandwich the insulation film between the first reflection prevention film and the light receiving region, and includes a silicon nitride film. An interlayer insulation film is arranged on the first reflection prevention film, and a second reflection prevention film is laminated between the first reflection prevention film and the interlayer insulation film. At least one of side walls of the gate electrodes of the transistors includes the silicon nitride film and a silicon oxide film arranged between the silicon nitride film and the gate electrodes. A transistor having a gate electrode with such a side wall includes a source or drain region of an LDD structure, in which a heavily doped region of the source or drain region of the LDD structure is self aligned to the side wall formed from the silicon nitride film and the silicon oxide film.

摘要翻译： 光电转换装置被配置为包括用于将光转换为信号电荷的光接收区域和晶体管。 绝缘膜布置在光接收区域的表面和晶体管的栅电极下方。 折射率高于绝缘膜的第一防反射膜至少布置在光接收区域的上方，以将绝缘膜夹在第一防反射膜和受光区之间，并且包括氮化硅膜。 在第一反射防止膜上设置层间绝缘膜，在第一防反射膜与层间绝缘膜之间层叠第二防反射膜。 晶体管的栅电极的至少一个侧壁包括氮化硅膜和布置在氮化硅膜和栅电极之间的氧化硅膜。 具有具有这种侧壁的栅电极的晶体管包括LDD结构的源极或漏极区域，其中LDD结构的源极或漏极区域的重掺杂区域与由氮化硅形成的侧壁自对准 膜和氧化硅膜。

公开(公告)号：US07342269B1

公开(公告)日：2008-03-11

申请号：US09633175

申请日：2000-08-04

申请人： Hiroshi Yuzurihara

发明人： Hiroshi Yuzurihara

IPC分类号： H01L31/062

CPC分类号： H01L27/14689 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14643

摘要： In a photoelectric conversion device comprising a photoelectric-conversion section and a peripheral circuit section where signals sent from the photoelectric-conversion section are processed, the both sections being provided on the same semiconductor substrate, a semiconductor compound layer of a high-melting point metal is provided on the source and drain and a gate electrode of an MOS transistor that forms the peripheral circuit section, and the top surface of a semiconductor diffusion layer that serves as a light-receiving part of the photoelectric conversion section is in contact with an insulating layer.

摘要翻译： 在包括光电转换部分和外围电路部分的光电转换装置中，其中处理从光电转换部分发送的信号的两个部分设置在相同的半导体衬底上，高熔点金属的半导体化合物层是 设置在源极和漏极以及形成外围电路部分的MOS晶体管的栅极电极，并且用作光电转换部分的光接收部分的半导体扩散层的顶表面与绝缘层接触 。

公开(公告)号：US20070018080A1

公开(公告)日：2007-01-25

申请号：US11527485

申请日：2006-09-27

申请人： Shunsuke Inoue ,  Hiroshi Yuzurihara ,  Tetsuya Itano

发明人： Shunsuke Inoue ,  Hiroshi Yuzurihara ,  Tetsuya Itano

IPC分类号： H01J40/14 ,  H01L31/00

CPC分类号： H01L27/14609 ,  H01L27/14603 ,  H01L27/1462

摘要： A photoelectric conversion device has pixels arranged in an array. Each pixel includes a light receiving region for converting light to signal charges and an insulation film formed on a surface of the light receiving region. Each pixel further includes transistors, including an amplifying transistor for amplifying the signal charges. A reflection prevention film is provided that has a refractive index higher than that of the insulation film and is arranged above the light receiving region, with the insulation film disposed between the reflection prevention film and the light receiving region. Film thicknesses of the insulation film and gate insulation films of the transistors are different from each other.

摘要翻译： 光电转换装置具有排列成阵列的像素。 每个像素包括用于将光转换为信号电荷的光接收区域和形成在光接收区域的表面上的绝缘膜。 每个像素还包括晶体管，其包括用于放大信号电荷的放大晶体管。 提供了具有比绝缘膜高的折射率的反射防止膜，并且设置在光接收区域的上方，绝缘膜设置在防反射膜和受光区之间。 晶体管的绝缘膜和栅极绝缘膜的膜厚度彼此不同。

公开(公告)号：US20060172450A1

公开(公告)日：2006-08-03

申请号：US11275672

申请日：2006-01-24

申请人： Koichi Tazoe ,  Sakae Hashimoto ,  Akira Ohtani ,  Hiroshi Yuzurihara

发明人： Koichi Tazoe ,  Sakae Hashimoto ,  Akira Ohtani ,  Hiroshi Yuzurihara

IPC分类号： H01L21/00

CPC分类号： H01L27/14643 ,  H01L27/1462 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14685 ,  H01L27/14689

摘要： In an image pickup device, a step of forming an embedded plug includes a step of forming a connecting hole in the insulation film in which the embedded plug is to be formed, a metal layer deposition step of depositing a metal layer on the insulation film in which the connecting hole is formed, thereby covering an interior of the connecting hole and at least a part of an upper surface of the insulation film in a laminating direction thereof, and a metal layer removing step of polishing the upper surface of the insulation film on which the metal layer is deposited thereby removing the metal layer except for the interior of the connecting hole, an etch-back method performed on the embedded plug in at least an insulation film, and a chemical mechanical polishing method performed on the embedded plug in another insulation film.

摘要翻译： 在图像拾取装置中，形成嵌入式插头的步骤包括在要形成嵌入式插头的绝缘膜中形成连接孔的步骤，在绝缘膜上沉积金属层的金属层沉积步骤 所述连接孔形成，从而覆盖所述连接孔的内部和所述绝缘膜的层叠方向的上表面的至少一部分，以及金属层除去工序，对所述绝缘膜的上表面进行研磨 其中沉积金属层，从而除去连接孔内部的金属层，在至少绝缘膜上对嵌入式插塞执行的回蚀方法以及在嵌入式插头上执行的化学机械抛光方法 绝缘膜。

公开(公告)号：US5567962A

公开(公告)日：1996-10-22

申请号：US263147

申请日：1994-06-21

申请人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

发明人： Mamoru Miyawaki ,  Akira Ishizaki ,  Genzo Momma ,  Hiroshi Yuzurihara ,  Tetsunobu Kohchi

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L27/102 ,  H01L27/108 ,  H01L27/115 ,  H01L29/423 ,  H01L29/786 ,  H01L29/78

CPC分类号： H01L29/7851 ,  H01L21/823475 ,  H01L27/1026 ,  H01L27/10805 ,  H01L27/115 ,  H01L29/66795

摘要： A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.

摘要翻译： 一种半导体存储器件，包括：绝缘栅晶体管，具有沿着基板的主表面设置的多个主电极区域和设置在所述多个主电极区域之间的沟道区域;以及栅极电极，设置在所述沟道区域上， 绝缘体之间，所述栅电极具有至少两个相对的部分; 以及设置在所述主电极区域之一上的电可破坏的存储元件。

公开(公告)号：US5541454A

公开(公告)日：1996-07-30

申请号：US478115

申请日：1995-06-07

申请人： Shunsuke Inoue ,  Yukihiko Sakashita ,  Yoshio Nakamura ,  Shin Kikuchi ,  Hiroshi Yuzurihara

发明人： Shunsuke Inoue ,  Yukihiko Sakashita ,  Yoshio Nakamura ,  Shin Kikuchi ,  Hiroshi Yuzurihara

IPC分类号： H01L27/108 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L27/10829 ,  H01L2924/0002

摘要： A semiconductor device comprises a capacitor consisting of an Al region formed on a semiconductor substrate, an Al oxide film formed on a surface of said Al region, and electrodes opposed to said Al region with interposition of said Al oxide film.

摘要翻译： 半导体器件包括由在半导体衬底上形成的Al区域，形成在所述Al区域的表面上的Al氧化物膜和与所述Al区域相对的电极组成的电容器，插入所述Al氧化物膜。

公开(公告)号：US07749788B2

公开(公告)日：2010-07-06

申请号：US11840583

申请日：2007-08-17

申请人： Takashi Okagawa ,  Hiroaki Naruse ,  Hiroshi Yuzurihara ,  Shigeru Nishimura ,  Takeshi Aoki ,  Yuya Fujino

发明人： Takashi Okagawa ,  Hiroaki Naruse ,  Hiroshi Yuzurihara ,  Shigeru Nishimura ,  Takeshi Aoki ,  Yuya Fujino

IPC分类号： H01L21/00

CPC分类号： H01L27/14689 ,  H01L21/76877 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14612 ,  H01L27/14636 ,  H01L27/14643

摘要： A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to a gate electrode of an amplifying MOS transistor not through wirings included in a wiring layer. Moreover, a second electroconductor electrically connects a second semiconductor region different from the first semiconductor region to a wiring. In a constitution of that second electroconductor, a third electroconductor arranged in a second hole arranged in the first interlayer insulation layer and a fourth electroconductor arranged in a third hole arranged in the second interlayer insulation layer are stacked and electrically connected to each other. And the step of forming the first electroconductor, and the step of forming the third electroconductor are performed simultaneously.

公开(公告)号：US07247899B2

公开(公告)日：2007-07-24

申请号：US10937382

申请日：2004-09-10

申请人： Hideshi Kuwabara ,  Hiroshi Yuzurihara ,  Takayuki Kimura ,  Mahito Shinohara

发明人： Hideshi Kuwabara ,  Hiroshi Yuzurihara ,  Takayuki Kimura ,  Mahito Shinohara

IPC分类号： H01L31/062 ,  H01L31/113

CPC分类号： H01L27/14687 ,  H01L27/1463 ,  H01L27/14632

摘要： In a photoelectric conversion device having a buried layer in a part of an anode and a cathode of a photodiode, such as a CCD having a sensor structure and a CMOS sensor, well of the same conduction type as the conduction type of the buried layer can be disposed in a peripheral circuit and the potential of each well is independently controlled.In a photoelectric conversion device which is constructed in such a manner that on the whole area of a substrate of a specific conduction type there are disposed a buried layer of a conduction type opposite to the conduction type of the substrate and an epitaxial layer of the same conduction type as the conduction type of the substrate and that well of a conduction type opposite to the conduction type of the substrate are present in a part of the epitaxial layer, buried layer for well isolation of the same conduction type as the conduction type of the substrate which have a higher concentration than the epitaxial layer is disposed between the lower part of the well and the buried layer.

摘要翻译： 在具有在阳极的一部分中的掩埋层和具有传感器结构的CCD的诸如CCD的CMOS光电二极管的光电转换装置中，与掩埋层的导电类型相同的导电类型 设置在外围电路中，并且每个阱的电位被独立地控制。 在以这样的方式构成的光电转换装置中，在特定导电类型的基板的整个区域上设置有与基板的导电类型相反的导电类型的掩埋层和与其相同的外延层 导电类型作为衬底的导电类型，并且与衬底的导电类型相反的导电类型的阱存在于外延层的一部分中，用于良好隔离导电类型的导电类型的掩埋层 具有比外延层更高的浓度的衬底设置在阱的下部和掩埋层之间。