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公开(公告)号:US09971890B2
公开(公告)日:2018-05-15
申请号:US15164084
申请日:2016-05-25
Applicant: Intel Corporation
Inventor: Sandeep Ahuja , Robin Steinbrecher , David Richardson
CPC classification number: G06F21/554 , G06F1/206 , G06F21/00 , G06F21/572 , G06F2221/034 , Y02D10/16
Abstract: Methods and systems may provide for identifying a thermal management setting in a computing system, and comparing the thermal management setting to valid configuration information. In addition, the thermal management setting may be modified if it does not comply with the valid configuration information, wherein the modification can cause the thermal management setting to comply with the valid configuration information. Additionally, a threat risk notification can be initiated in order to notify users of the non-compliance.
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公开(公告)号:US20170285699A1
公开(公告)日:2017-10-05
申请号:US15086387
申请日:2016-03-31
Applicant: Intel Corporation
Inventor: Sandeep Ahuja , Jeremy Ridge , Michael Berktold
CPC classification number: G06F1/206 , G06F1/3203 , G06F1/324 , G06F1/3243 , G06F1/3296 , Y02D10/126 , Y02D10/152 , Y02D10/16 , Y02D10/172 , Y02D50/20
Abstract: In one embodiment, a processor comprises: a first die including at least one core and at least one first die thermal sensor; a second die including at least one memory and at least one second die thermal sensor; and a thermal controller to receive first thermal data from the at least one first die thermal sensor and second thermal data from the at least one second die thermal sensor, calculate a first thermal margin for the first die based at least in part on the first thermal data and a first thermal loadline for the first die and calculate a second thermal margin for the second die based at least in part on the second thermal data and a second thermal loadline for the second die. Other embodiments are described and claimed.
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公开(公告)号:US09646910B2
公开(公告)日:2017-05-09
申请号:US15019931
申请日:2016-02-09
Applicant: INTEL CORPORATION
Inventor: Sandeep Ahuja , Eric W. Buddrius , Roger D. Flynn , Rajat Agarwal
IPC: H05K7/20 , H05K13/00 , G06F1/20 , H01L23/36 , H01L23/433 , H01L21/48 , H01L25/065 , H01L25/00
CPC classification number: H01L23/36 , G06F1/20 , H01L21/4882 , H01L23/433 , H01L25/0655 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H05K7/20445 , Y10T29/49002 , H01L2924/00
Abstract: In at least some embodiments, an electronic package to maximize heat transfer comprises a plurality of components on a substrate. A stiffener plate is installed over the components. The stiffener plate has openings to expose the components. A plurality of individual integrated heat spreaders are installed within the openings over the components. A first thermal interface material layer (TIM1) is deposited between the components and the plurality of individual integrated heat spreaders. In at least some embodiments, the thickness of the TIM1 is minimized for the components.
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