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    High Solar Gain Low-E Panel and Method for Forming the Same
    34.
    发明申请
    High Solar Gain Low-E Panel and Method for Forming the Same 有权
    高太阳能增益低E面板及其形成方法

    公开(公告)号：US20140268317A1

    公开(公告)日：2014-09-18

    申请号：US13799100

    申请日：2013-03-13

    Applicant: INTERMOLECULAR INC.

    Inventor： Guowen Ding ,  Jeremy Cheng ,  Minh Huu Le ,  Daniel Schweigert ,  Zhi-Wen Wen Sun ,  Guizhen Zhang

    IPC: G02B5/20 ,  C23C14/34

    CPC classification number: G02B5/208 ,  C03C17/36 ,  C03C17/3644 ,  C03C17/366 ,  G02B5/281

    Abstract: Embodiments provided herein describe low-e panels and methods for forming low-e panels. A transparent substrate is provided. A reflective layer is formed above the transparent substrate. An over-coating layer is formed above the reflective layer. The over-coating layer includes first, second, and third sub-layers. The second sub-layer is between the first and third sub-layers, and the first and third sub-layers include the same material

    Abstract translation: 本文提供的实施例描述了用于形成低e板的低e板和方法。 提供透明基板。 在透明基板的上方形成反射层。 在反射层上方形成覆盖层。 覆盖层包括第一，第二和第三子层。 第二子层位于第一和第三子层之间，第一和第三子层包括相同的材料

    Silver Based Conductive Layer For Flexible Electronics
    36.
    发明申请
    Silver Based Conductive Layer For Flexible Electronics 有权
    用于柔性电子学的银基导电层

    公开(公告)号：US20140170413A1

    公开(公告)日：2014-06-19

    申请号：US13715477

    申请日：2012-12-14

    Applicant: INTERMOLECULAR INC.

    Inventor： Mohd Fadzli Anwar Hassan ,  Guowen Ding ,  Minh Huu Le ,  Minh Anh Anh Nguyen ,  Zhi-Wen Wen Sun ,  Guizhen Zhang

    IPC: H01B1/02

    CPC classification number: H05K1/092 ,  C23C28/42 ,  C23C30/00 ,  H01L51/0097 ,  H01L51/5234 ,  H05K1/0274 ,  Y10T428/265

    Abstract: Methods for making conducting stacks includes forming a doped or alloyed silver layer sandwiched between two layers of transparent conductive oxide such as indium tin oxide (ITO). The doped silver or silver alloy layer can be thin, such as between 1.5 to 20 nm and thus can be transparent. The doped silver or silver alloy can provide improved ductility property, allowing the conductive stack to be bendable. The transparent conductive oxide layers can also be thin, allowing the conductive stack can have improved ductility property.

    Abstract translation: 制造导电叠层的方法包括形成夹在两层透明导电氧化物（例如氧化铟锡（ITO））之间的掺杂或合金化的银层。 掺杂的银或银合金层可以是薄的，例如在1.5至20nm之间，因此可以是透明的。 掺杂的银或银合金可以提供改善的延展性，允许导电叠层可弯曲。 透明导电氧化物层也可以是薄的，使得导电叠层可以具有改善的延展性。

    Methods and apparatuses for patterned low emissivity panels
    37.
    发明申请
    Methods and apparatuses for patterned low emissivity panels 有权
    图案化低辐射面板的方法和装置

    公开(公告)号：US20140168759A1

    公开(公告)日：2014-06-19

    申请号：US13715528

    申请日：2012-12-14

    Applicant: INTERMOLECULAR INC.

    Inventor： Minh Huu Le ,  Brent Boyce ,  Guowen Ding ,  Mohd Fadzli Anwar Hassan ,  Zhi-Wen Wen Sun

    IPC: B05D5/06 ,  G02B5/20

    CPC classification number: G02B5/208

    Abstract: A method for making low emissivity panels, comprising forming a patterned layer on a transparent substrate. The patterned layers can offer different color schemes or different decorative appearance styles for the coated panels, or can offer gradable thermal efficiency through the patterned layers.

    Abstract translation: 一种制造低辐射面板的方法，包括在透明基底上形成图案层。 图案化的层可以为涂覆的面板提供不同的配色方案或不同的装饰外观样式，或者可以通过图案化层提供可分级的热效率。

    Methods for Forming Nickel Oxide Films for Use With Resistive Switching Memory Devices
    38.
    发明申请
    Methods for Forming Nickel Oxide Films for Use With Resistive Switching Memory Devices 审中-公开
    用于形成用于电阻式开关存储器件的氧化镍膜的方法

    公开(公告)号：US20130334491A1

    公开(公告)日：2013-12-19

    申请号：US13972515

    申请日：2013-08-21

    Applicant: Intermolecular Inc.

    Inventor： Zhi-Wen Wen Sun ,  Tony P. Chiang ,  Chi-I Lang ,  Jinhong Tong

    IPC: H01L45/00

    CPC classification number: H01L45/1253 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

    Abstract: Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where the forming the Ni(OH)2 occurs at the cathode; and annealing the Ni(OH)2 film to form the NiO film, where the NiO film forms a portion of a resistive switching memory element. In some embodiments, methods further include forming a top electrode on the NiO film and before the forming the Ni(OH)2 film, pre-treating the substrate. In some embodiments, methods are presented where the bottom electrode and the top electrode are a conductive material such as: Ni, Pt, Ir, Ti, Al, Cu, Co, Ru, Rh, a Ni alloy, a Pt alloy, an Ir alloy, a Ti alloy, an Al alloy, a Cu alloy, a Co alloy, a Ru alloy, and an Rh alloy.

    Abstract translation: 在电阻式切换存储装置使用的基板上形成NiO膜的方法包括：制备镍离子溶液; 接收衬底，其中衬底包括底部电极，用作阴极的底部电极; 在衬底上形成Ni（OH）2膜，其中在阴极处形成Ni（OH）2; 并且还原Ni（OH）2膜以形成NiO膜，其中NiO膜形成电阻式开关存储元件的一部分。 在一些实施例中，方法还包括在NiO膜上形成顶部电极，并且在形成Ni（OH）2膜之前，预处理衬底。 在一些实施例中，呈现了底部电极和顶部电极为导电材料的方法，例如：Ni，Pt，Ir，Ti，Al，Cu，Co，Ru，Rh，Ni合金，Pt合金，Ir 合金，Ti合金，Al合金，Cu合金，Co合金，Ru合金和Rh合金。

    Methods for forming resistive switching memory elements
    39.
    发明申请
    Methods for forming resistive switching memory elements 有权

    公开(公告)号：US20130260508A1

    公开(公告)日：2013-10-03

    申请号：US13909324

    申请日：2013-06-04

    Applicant: Intermolecular Inc.

    Inventor： Nitin Kumar ,  Tony P. Chiang ,  Chi-I Lang ,  Zhi-Wen Wen Sun ,  Jinhong Tong

    IPC: H01L45/00

    CPC classification number: H01L45/145 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1633

    Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

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